forked from libre-chip/fayalite
sim/interpreter: fix StatePartLayout name in debug output
This commit is contained in:
parent
393f78a14d
commit
562c479b62
8 changed files with 104 additions and 104 deletions
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@ -3,7 +3,7 @@ Simulation {
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insns: Insns {
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state_layout: StateLayout {
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ty: TypeLayout {
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small_slots: StatePartAllocationLayout<SmallSlots> {
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small_slots: StatePartLayout<SmallSlots> {
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len: 5,
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debug_data: [
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SlotDebugData {
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@ -33,7 +33,7 @@ Simulation {
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],
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..
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},
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big_slots: StatePartAllocationLayout<BigSlots> {
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big_slots: StatePartLayout<BigSlots> {
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len: 82,
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debug_data: [
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SlotDebugData {
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@ -388,7 +388,7 @@ Simulation {
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..
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},
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},
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memories: StatePartAllocationLayout<Memories> {
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memories: StatePartLayout<Memories> {
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len: 0,
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debug_data: [],
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layout_data: [],
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@ -999,12 +999,12 @@ Simulation {
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rst: SyncReset,
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},
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layout: TypeLayout {
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small_slots: StatePartAllocationLayout<SmallSlots> {
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small_slots: StatePartLayout<SmallSlots> {
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len: 0,
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debug_data: [],
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..
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},
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big_slots: StatePartAllocationLayout<BigSlots> {
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big_slots: StatePartLayout<BigSlots> {
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len: 2,
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debug_data: [
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SlotDebugData {
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@ -1029,12 +1029,12 @@ Simulation {
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ty: CompiledTypeLayout {
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ty: Clock,
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layout: TypeLayout {
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small_slots: StatePartAllocationLayout<SmallSlots> {
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small_slots: StatePartLayout<SmallSlots> {
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len: 0,
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debug_data: [],
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..
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},
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big_slots: StatePartAllocationLayout<BigSlots> {
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big_slots: StatePartLayout<BigSlots> {
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len: 1,
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debug_data: [
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SlotDebugData {
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@ -1056,12 +1056,12 @@ Simulation {
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ty: CompiledTypeLayout {
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ty: SyncReset,
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layout: TypeLayout {
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small_slots: StatePartAllocationLayout<SmallSlots> {
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small_slots: StatePartLayout<SmallSlots> {
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len: 0,
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debug_data: [],
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..
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},
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big_slots: StatePartAllocationLayout<BigSlots> {
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big_slots: StatePartLayout<BigSlots> {
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len: 1,
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debug_data: [
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SlotDebugData {
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@ -1094,12 +1094,12 @@ Simulation {
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layout: CompiledTypeLayout {
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ty: Clock,
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layout: TypeLayout {
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small_slots: StatePartAllocationLayout<SmallSlots> {
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small_slots: StatePartLayout<SmallSlots> {
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len: 0,
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debug_data: [],
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..
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},
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big_slots: StatePartAllocationLayout<BigSlots> {
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big_slots: StatePartLayout<BigSlots> {
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len: 1,
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debug_data: [
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SlotDebugData {
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@ -1128,12 +1128,12 @@ Simulation {
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layout: CompiledTypeLayout {
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ty: SyncReset,
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layout: TypeLayout {
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small_slots: StatePartAllocationLayout<SmallSlots> {
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small_slots: StatePartLayout<SmallSlots> {
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len: 0,
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debug_data: [],
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..
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},
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big_slots: StatePartAllocationLayout<BigSlots> {
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big_slots: StatePartLayout<BigSlots> {
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len: 1,
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debug_data: [
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SlotDebugData {
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@ -1162,12 +1162,12 @@ Simulation {
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layout: CompiledTypeLayout {
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ty: UInt<4>,
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layout: TypeLayout {
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small_slots: StatePartAllocationLayout<SmallSlots> {
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small_slots: StatePartLayout<SmallSlots> {
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len: 0,
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debug_data: [],
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..
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},
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big_slots: StatePartAllocationLayout<BigSlots> {
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big_slots: StatePartLayout<BigSlots> {
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len: 1,
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debug_data: [
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SlotDebugData {
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@ -1196,12 +1196,12 @@ Simulation {
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layout: CompiledTypeLayout {
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ty: UInt<4>,
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layout: TypeLayout {
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small_slots: StatePartAllocationLayout<SmallSlots> {
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small_slots: StatePartLayout<SmallSlots> {
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len: 0,
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debug_data: [],
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..
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},
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big_slots: StatePartAllocationLayout<BigSlots> {
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big_slots: StatePartLayout<BigSlots> {
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len: 1,
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debug_data: [
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SlotDebugData {
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@ -1230,12 +1230,12 @@ Simulation {
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layout: CompiledTypeLayout {
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ty: Bool,
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layout: TypeLayout {
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small_slots: StatePartAllocationLayout<SmallSlots> {
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small_slots: StatePartLayout<SmallSlots> {
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len: 0,
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debug_data: [],
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..
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},
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big_slots: StatePartAllocationLayout<BigSlots> {
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big_slots: StatePartLayout<BigSlots> {
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len: 1,
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debug_data: [
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SlotDebugData {
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@ -1264,12 +1264,12 @@ Simulation {
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layout: CompiledTypeLayout {
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ty: UInt<2>,
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layout: TypeLayout {
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small_slots: StatePartAllocationLayout<SmallSlots> {
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small_slots: StatePartLayout<SmallSlots> {
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len: 0,
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debug_data: [],
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..
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},
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big_slots: StatePartAllocationLayout<BigSlots> {
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big_slots: StatePartLayout<BigSlots> {
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len: 1,
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debug_data: [
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SlotDebugData {
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@ -1298,12 +1298,12 @@ Simulation {
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layout: CompiledTypeLayout {
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ty: UInt<2>,
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layout: TypeLayout {
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small_slots: StatePartAllocationLayout<SmallSlots> {
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small_slots: StatePartLayout<SmallSlots> {
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len: 0,
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debug_data: [],
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..
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},
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big_slots: StatePartAllocationLayout<BigSlots> {
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big_slots: StatePartLayout<BigSlots> {
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len: 1,
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debug_data: [
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SlotDebugData {
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