sim: add WIP memory test

This commit is contained in:
Jacob Lifshay 2024-12-11 23:28:15 -08:00
parent 8616ee4737
commit 393f78a14d
Signed by: programmerjake
SSH key fingerprint: SHA256:HnFTLGpSm4Q4Fj502oCFisjZSoakwEuTsJJMSke63RQ
11 changed files with 1155 additions and 304 deletions

View file

@ -875,6 +875,7 @@ Simulation {
..
},
pc: 100,
memory_write_log: [],
memories: StatePart {
value: [],
},
@ -1333,12 +1334,12 @@ Simulation {
name: "cd",
fields: [
TraceClock {
id: TraceScalarId(0),
location: TraceScalarId(0),
name: "clk",
flow: Source,
},
TraceSyncReset {
id: TraceScalarId(1),
location: TraceScalarId(1),
name: "rst",
flow: Source,
},
@ -1362,7 +1363,7 @@ Simulation {
TraceModuleIO {
name: "en",
child: TraceBool {
id: TraceScalarId(2),
location: TraceScalarId(2),
name: "en",
flow: Source,
},
@ -1372,7 +1373,7 @@ Simulation {
TraceModuleIO {
name: "which_in",
child: TraceUInt {
id: TraceScalarId(3),
location: TraceScalarId(3),
name: "which_in",
ty: UInt<2>,
flow: Source,
@ -1383,7 +1384,7 @@ Simulation {
TraceModuleIO {
name: "data_in",
child: TraceUInt {
id: TraceScalarId(4),
location: TraceScalarId(4),
name: "data_in",
ty: UInt<4>,
flow: Source,
@ -1394,7 +1395,7 @@ Simulation {
TraceModuleIO {
name: "which_out",
child: TraceUInt {
id: TraceScalarId(5),
location: TraceScalarId(5),
name: "which_out",
ty: UInt<2>,
flow: Sink,
@ -1405,7 +1406,7 @@ Simulation {
TraceModuleIO {
name: "data_out",
child: TraceUInt {
id: TraceScalarId(6),
location: TraceScalarId(6),
name: "data_out",
ty: UInt<4>,
flow: Sink,
@ -1418,7 +1419,7 @@ Simulation {
child: TraceEnumWithFields {
name: "the_reg",
discriminant: TraceEnumDiscriminant {
id: TraceScalarId(7),
location: TraceScalarId(7),
name: "$tag",
ty: Enum {
A,
@ -1432,13 +1433,13 @@ Simulation {
name: "B",
fields: [
TraceUInt {
id: TraceScalarId(8),
location: TraceScalarId(8),
name: "0",
ty: UInt<1>,
flow: Source,
},
TraceBool {
id: TraceScalarId(9),
location: TraceScalarId(9),
name: "1",
flow: Source,
},
@ -1458,13 +1459,13 @@ Simulation {
name: "a",
elements: [
TraceUInt {
id: TraceScalarId(10),
location: TraceScalarId(10),
name: "[0]",
ty: UInt<1>,
flow: Source,
},
TraceUInt {
id: TraceScalarId(11),
location: TraceScalarId(11),
name: "[1]",
ty: UInt<1>,
flow: Source,
@ -1474,7 +1475,7 @@ Simulation {
flow: Source,
},
TraceSInt {
id: TraceScalarId(12),
location: TraceScalarId(12),
name: "b",
ty: SInt<2>,
flow: Source,
@ -1623,6 +1624,7 @@ Simulation {
last_state: 0x3,
},
],
trace_memories: {},
trace_writers: [
Running(
VcdWriter {