#[hdl] match works!

This commit is contained in:
Jacob Lifshay 2024-09-19 23:51:49 -07:00
parent 9887d70f41
commit 2d293ae87b
Signed by: programmerjake
SSH key fingerprint: SHA256:B1iRVvUJkvd7upMIiMqn6OyxvD2SgJkAH3ZnUOj6z+c
4 changed files with 83 additions and 24 deletions

View file

@ -21,7 +21,7 @@ use crate::{
wire::Wire,
};
use bitvec::slice::BitSlice;
use std::{fmt, ops::Deref};
use std::{convert::Infallible, fmt, ops::Deref};
pub mod ops;
pub mod target;
@ -690,3 +690,10 @@ pub trait CastTo: ToExpr {
}
impl<T: ToExpr + ?Sized> CastTo for T {}
#[doc(hidden)]
pub fn check_match_expr<T: Type>(
_expr: Expr<T>,
_check_fn: impl FnOnce(T::MatchVariant, Infallible),
) {
}

View file

@ -662,7 +662,6 @@ circuit check_enum_literals:
};
}
#[cfg(todo)]
#[hdl_module(outline_generated)]
pub fn check_struct_enum_match() {
#[hdl]
@ -688,7 +687,7 @@ pub fn check_struct_enum_match() {
match i2 {
TestEnum::A => connect(o[2], 0_hdl_u8),
TestEnum::B(v) => connect(o[2], v),
TestEnum::C(v) => connect_any(o[2], v[1]),
TestEnum::C(v) => connect_any(o[2], v[1].cast_to(UInt[1])),
}
#[hdl]
match i2 {
@ -699,12 +698,11 @@ pub fn check_struct_enum_match() {
#[hdl]
match i2 {
TestEnum::B(_) => connect(o[4], 1_hdl_u8),
TestEnum::C(v) => connect_any(o[4], v[2]),
TestEnum::C(v) => connect_any(o[4], v[2].cast_to(UInt[1])),
_ => connect(o[4], 0_hdl_u8),
}
}
#[cfg(todo)]
#[test]
fn test_struct_enum_match() {
let _n = SourceLocation::normalize_files_for_tests();
@ -715,14 +713,14 @@ fn test_struct_enum_match() {
m =>
"/test/check_struct_enum_match.fir": r"FIRRTL version 3.2.0
circuit check_struct_enum_match:
type Ty0 = {|None, Some: UInt<8>|}
type Ty0 = {|HdlNone, HdlSome: UInt<8>|}
type Ty1 = {|A, B: UInt<8>, C: UInt<1>[3]|}
module check_struct_enum_match: @[module-XXXXXXXXXX.rs 1:1]
input i1: Ty0 @[module-XXXXXXXXXX.rs 2:1]
input i2: Ty1 @[module-XXXXXXXXXX.rs 3:1]
output o: UInt<8>[5] @[module-XXXXXXXXXX.rs 4:1]
match i1: @[module-XXXXXXXXXX.rs 5:1]
None:
HdlNone:
match i2: @[module-XXXXXXXXXX.rs 6:1]
A:
connect o[0], UInt<8>(0h17) @[module-XXXXXXXXXX.rs 7:1]
@ -730,12 +728,12 @@ circuit check_struct_enum_match:
connect o[0], add(_match_arm_value, UInt<8>(0h2)) @[module-XXXXXXXXXX.rs 8:1]
C(_match_arm_value_1):
connect o[0], UInt<8>(0h17) @[module-XXXXXXXXXX.rs 7:1]
Some(_match_arm_value_2):
HdlSome(_match_arm_value_2):
connect o[0], _match_arm_value_2 @[module-XXXXXXXXXX.rs 9:1]
match i1: @[module-XXXXXXXXXX.rs 10:1]
None:
HdlNone:
connect o[1], UInt<8>(0h0) @[module-XXXXXXXXXX.rs 11:1]
Some(_match_arm_value_3):
HdlSome(_match_arm_value_3):
connect o[1], UInt<8>(0h1) @[module-XXXXXXXXXX.rs 12:1]
match i2: @[module-XXXXXXXXXX.rs 13:1]
A:
@ -768,7 +766,7 @@ circuit check_struct_enum_match:
m =>
"/test/check_struct_enum_match.fir": r"FIRRTL version 3.2.0
circuit check_struct_enum_match:
type Ty0 = {|None, Some|}
type Ty0 = {|HdlNone, HdlSome|}
type Ty1 = {tag: Ty0, body: UInt<8>}
type Ty2 = {|A, B, C|}
type Ty3 = {tag: Ty2, body: UInt<8>}
@ -777,7 +775,7 @@ circuit check_struct_enum_match:
input i2: Ty3 @[module-XXXXXXXXXX.rs 3:1]
output o: UInt<8>[5] @[module-XXXXXXXXXX.rs 4:1]
match i1.tag: @[module-XXXXXXXXXX.rs 5:1]
None:
HdlNone:
match i2.tag: @[module-XXXXXXXXXX.rs 6:1]
A:
connect o[0], UInt<8>(0h17) @[module-XXXXXXXXXX.rs 7:1]
@ -785,12 +783,12 @@ circuit check_struct_enum_match:
connect o[0], add(bits(i2.body, 7, 0), UInt<8>(0h2)) @[module-XXXXXXXXXX.rs 8:1]
C:
connect o[0], UInt<8>(0h17) @[module-XXXXXXXXXX.rs 7:1]
Some:
HdlSome:
connect o[0], bits(i1.body, 7, 0) @[module-XXXXXXXXXX.rs 9:1]
match i1.tag: @[module-XXXXXXXXXX.rs 10:1]
None:
HdlNone:
connect o[1], UInt<8>(0h0) @[module-XXXXXXXXXX.rs 11:1]
Some:
HdlSome:
connect o[1], UInt<8>(0h1) @[module-XXXXXXXXXX.rs 12:1]
match i2.tag: @[module-XXXXXXXXXX.rs 13:1]
A: