forked from libre-chip/fayalite
sim: properly update all VCD wires when they share simulation state
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parent
2266315944
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26224abe1c
41 changed files with 2666 additions and 1621 deletions
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@ -81,9 +81,9 @@ Simulation {
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big_slots: StatePart {
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value: [
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5,
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5 (modified),
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5,
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6,
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6,
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6 (modified),
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],
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},
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sim_only_slots: StatePart {
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