diff --git a/Cargo.lock b/Cargo.lock
index 0e630d1..65debc8 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -210,7 +210,6 @@ name = "cpu"
 version = "0.1.0"
 dependencies = [
  "fayalite",
- "serde",
 ]
 
 [[package]]
@@ -304,7 +303,7 @@ checksum = "e8c02a5121d4ea3eb16a80748c74f5549a5665e4c21333c6098f283870fbdea6"
 [[package]]
 name = "fayalite"
 version = "0.3.0"
-source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#0be9f9ce2329fd455a40f87e70c51a3ab672cc40"
+source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#0b821787408e940d30799a525743f25e64d1c6ae"
 dependencies = [
  "base64",
  "bitvec",
@@ -331,7 +330,7 @@ dependencies = [
 [[package]]
 name = "fayalite-proc-macros"
 version = "0.3.0"
-source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#0be9f9ce2329fd455a40f87e70c51a3ab672cc40"
+source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#0b821787408e940d30799a525743f25e64d1c6ae"
 dependencies = [
  "fayalite-proc-macros-impl",
 ]
@@ -339,7 +338,7 @@ dependencies = [
 [[package]]
 name = "fayalite-proc-macros-impl"
 version = "0.3.0"
-source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#0be9f9ce2329fd455a40f87e70c51a3ab672cc40"
+source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#0b821787408e940d30799a525743f25e64d1c6ae"
 dependencies = [
  "base16ct",
  "num-bigint",
@@ -354,7 +353,7 @@ dependencies = [
 [[package]]
 name = "fayalite-visit-gen"
 version = "0.3.0"
-source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#0be9f9ce2329fd455a40f87e70c51a3ab672cc40"
+source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#0b821787408e940d30799a525743f25e64d1c6ae"
 dependencies = [
  "indexmap",
  "prettyplease",
diff --git a/Cargo.toml b/Cargo.toml
index a3e74f0..57ca631 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -15,7 +15,6 @@ rust-version = "1.89.0"
 
 [workspace.dependencies]
 fayalite = { git = "https://git.libre-chip.org/libre-chip/fayalite.git", version = "0.3.0", branch = "master" }
-serde = { version = "1.0.202", features = ["derive"] }
 
 [profile.dev]
 opt-level = 1
diff --git a/crates/cpu/Cargo.toml b/crates/cpu/Cargo.toml
index 4dd85d8..16ec0b9 100644
--- a/crates/cpu/Cargo.toml
+++ b/crates/cpu/Cargo.toml
@@ -16,4 +16,3 @@ version.workspace = true
 
 [dependencies]
 fayalite.workspace = true
-serde.workspace = true
diff --git a/crates/cpu/src/config.rs b/crates/cpu/src/config.rs
index ed3b814..4e66010 100644
--- a/crates/cpu/src/config.rs
+++ b/crates/cpu/src/config.rs
@@ -8,10 +8,9 @@ use crate::{
     },
 };
 use fayalite::prelude::*;
-use serde::{Deserialize, Serialize};
 use std::num::NonZeroUsize;
 
-#[derive(Clone, Eq, PartialEq, Hash, Debug, Serialize, Deserialize)]
+#[derive(Clone, Eq, PartialEq, Hash, Debug)]
 #[non_exhaustive]
 pub struct UnitConfig {
     pub kind: UnitKind,
@@ -28,14 +27,12 @@ impl UnitConfig {
     }
 }
 
-#[derive(Clone, Eq, PartialEq, Hash, Debug, Serialize, Deserialize)]
+#[derive(Clone, Eq, PartialEq, Hash, Debug)]
 #[non_exhaustive]
 pub struct CpuConfig {
     pub units: Vec<UnitConfig>,
     pub out_reg_num_width: usize,
     pub fetch_width: NonZeroUsize,
-    pub max_branches_per_fetch: NonZeroUsize,
-    pub fetch_width_in_bytes: NonZeroUsize,
     /// default value for [`UnitConfig::max_in_flight`]
     pub default_unit_max_in_flight: NonZeroUsize,
     pub rob_size: NonZeroUsize,
@@ -49,18 +46,6 @@ impl CpuConfig {
         };
         v
     };
-    pub const DEFAULT_MAX_BRANCHES_PER_FETCH: NonZeroUsize = {
-        let Some(v) = NonZeroUsize::new(1) else {
-            unreachable!();
-        };
-        v
-    };
-    pub const DEFAULT_FETCH_WIDTH_IN_BYTES: NonZeroUsize = {
-        let Some(v) = NonZeroUsize::new(4) else {
-            unreachable!();
-        };
-        v
-    };
     pub const DEFAULT_UNIT_MAX_IN_FLIGHT: NonZeroUsize = {
         let Some(v) = NonZeroUsize::new(8) else {
             unreachable!();
@@ -72,8 +57,6 @@ impl CpuConfig {
             units,
             out_reg_num_width: Self::DEFAULT_OUT_REG_NUM_WIDTH,
             fetch_width: Self::DEFAULT_FETCH_WIDTH,
-            max_branches_per_fetch: Self::DEFAULT_MAX_BRANCHES_PER_FETCH,
-            fetch_width_in_bytes: Self::DEFAULT_FETCH_WIDTH_IN_BYTES,
             default_unit_max_in_flight: Self::DEFAULT_UNIT_MAX_IN_FLIGHT,
             rob_size,
         }
@@ -134,12 +117,3 @@ impl CpuConfig {
             [self.non_const_unit_nums().len()]
     }
 }
-
-#[hdl(get(|c| c.fetch_width.get()))]
-pub type CpuConfigFetchWidth<C: PhantomConstGet<CpuConfig>> = DynSize;
-
-#[hdl(get(|c| c.max_branches_per_fetch.get()))]
-pub type CpuConfigMaxBranchesPerFetch<C: PhantomConstGet<CpuConfig>> = DynSize;
-
-#[hdl(get(|c| c.fetch_width_in_bytes.get()))]
-pub type CpuConfigFetchWidthInBytes<C: PhantomConstGet<CpuConfig>> = DynSize;
diff --git a/crates/cpu/src/lib.rs b/crates/cpu/src/lib.rs
index a00b668..bae3720 100644
--- a/crates/cpu/src/lib.rs
+++ b/crates/cpu/src/lib.rs
@@ -2,7 +2,6 @@
 // See Notices.txt for copyright information
 pub mod config;
 pub mod instruction;
-pub mod next_pc;
 pub mod reg_alloc;
 pub mod register;
 pub mod unit;
diff --git a/crates/cpu/src/next_pc.rs b/crates/cpu/src/next_pc.rs
deleted file mode 100644
index db0c910..0000000
--- a/crates/cpu/src/next_pc.rs
+++ /dev/null
@@ -1,117 +0,0 @@
-// SPDX-License-Identifier: LGPL-3.0-or-later
-// See Notices.txt for copyright information
-
-//! [Next-Instruction Logic](https://git.libre-chip.org/libre-chip/grant-tracking/issues/10)
-//!
-//! The basic idea here is that there's a `next_pc` stage that sends predicted fetch PCs to the `fetch` stage,
-//! the `fetch` stage's outputs eventually end up in the `decode` stage,
-//! after the `decode` stage there's a `post_decode` stage (that may run in the same clock cycle as `decode`)
-//! that checks that the fetched instructions' kinds match the predicted instruction kinds and that feeds
-//! information back to the `fetch` stage to cancel fetches that need to be predicted differently.
-
-use crate::{config::CpuConfig, util::array_vec::ArrayVec};
-use fayalite::prelude::*;
-use fayalite::util::ready_valid::ReadyValid;
-
-#[hdl]
-pub enum PredictedCond {
-    Taken,
-    Fallthrough,
-}
-
-#[hdl]
-pub struct PredictedFallthrough {}
-
-#[hdl]
-pub enum BranchPredictionKind<CondKind> {
-    Branch(HdlOption<CondKind>),
-    IndirectBranch(HdlOption<CondKind>),
-    Call(HdlOption<CondKind>),
-    IndirectCall(HdlOption<CondKind>),
-    Ret(HdlOption<CondKind>),
-}
-
-#[hdl(get(|c| c.max_branches_per_fetch.get() - 1))]
-pub type NextPcPredictionMaxBranchesBeforeLast<C: PhantomConstGet<CpuConfig>> = DynSize;
-
-#[hdl(no_static)]
-pub struct NextPcPrediction<C: PhantomConstGet<CpuConfig>> {
-    pub fetch_pc: UInt<64>,
-    pub async_interrupt: Bool,
-    pub branches_before_last: ArrayVec<
-        BranchPredictionKind<PredictedFallthrough>,
-        NextPcPredictionMaxBranchesBeforeLast<C>,
-    >,
-    pub last_branch: HdlOption<BranchPredictionKind<PredictedCond>>,
-    pub last_branch_target_pc: UInt<64>,
-}
-
-#[hdl]
-pub struct NextPcToFetchInterfaceInner {
-    pub next_fetch_pc: UInt<64>,
-    pub in_progress_fetches_to_cancel: UInt<8>,
-}
-
-#[hdl(no_static)]
-pub struct NextPcToFetchInterface<C: PhantomConstGet<CpuConfig>> {
-    pub inner: ReadyValid<NextPcToFetchInterfaceInner>,
-    pub config: C,
-}
-
-#[hdl(no_static)]
-/// handles updating speculative branch predictor state (e.g. branch histories) when instructions retire,
-/// as well as updating state when a branch instruction is mis-speculated.
-pub struct NextPcToRetireInterface<C: PhantomConstGet<CpuConfig>> {
-    // TODO: add needed fields
-    pub config: C,
-}
-
-#[hdl(no_static)]
-pub struct NextPcToPostDecodeInterface<C: PhantomConstGet<CpuConfig>> {
-    // TODO: add needed fields
-    pub config: C,
-}
-
-#[hdl(no_static)]
-pub struct FetchToPostDecodeInterface<C: PhantomConstGet<CpuConfig>> {
-    // TODO: add needed fields
-    pub config: C,
-}
-
-#[hdl(no_static)]
-pub struct PostDecodeOutputInterface<C: PhantomConstGet<CpuConfig>> {
-    // TODO: add needed fields
-    pub config: C,
-}
-
-#[hdl_module]
-pub fn next_pc(config: PhantomConst<CpuConfig>) {
-    #[hdl]
-    let cd: ClockDomain = m.input();
-    #[hdl]
-    let to_fetch_interface: NextPcToFetchInterface<PhantomConst<CpuConfig>> =
-        m.output(NextPcToFetchInterface[config]);
-    #[hdl]
-    let to_post_decode_interface: NextPcToPostDecodeInterface<PhantomConst<CpuConfig>> =
-        m.output(NextPcToPostDecodeInterface[config]);
-    #[hdl]
-    let to_retire_interface: NextPcToRetireInterface<PhantomConst<CpuConfig>> =
-        m.output(NextPcToRetireInterface[config]);
-    todo!()
-}
-
-#[hdl_module]
-pub fn post_decode(config: PhantomConst<CpuConfig>) {
-    #[hdl]
-    let cd: ClockDomain = m.input();
-    #[hdl]
-    let from_next_pc_interface: NextPcToPostDecodeInterface<PhantomConst<CpuConfig>> =
-        m.input(NextPcToPostDecodeInterface[config]);
-    #[hdl]
-    let from_fetch_interface: FetchToPostDecodeInterface<PhantomConst<CpuConfig>> =
-        m.output(FetchToPostDecodeInterface[config]);
-    #[hdl]
-    let output: PostDecodeOutputInterface<PhantomConst<CpuConfig>> =
-        m.output(PostDecodeOutputInterface[config]);
-    todo!()
-}
diff --git a/crates/cpu/src/unit.rs b/crates/cpu/src/unit.rs
index b71f79a..d6cd1d6 100644
--- a/crates/cpu/src/unit.rs
+++ b/crates/cpu/src/unit.rs
@@ -15,7 +15,6 @@ use fayalite::{
     intern::{Intern, Interned},
     prelude::*,
 };
-use serde::{Deserialize, Serialize};
 
 pub mod alu_branch;
 pub mod unit_base;
@@ -37,7 +36,7 @@ macro_rules! all_units {
         }
     ) => {
         $(#[$enum_meta])*
-        #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd, Hash, Debug, Serialize, Deserialize)]
+        #[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd, Hash, Debug)]
         $vis enum $UnitKind {
             $(
                 $(#[$variant_meta])*