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base: programmerjake:b85019ddd0ba5b40827f0e608f3fefb8405b9a46
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programmerjake:master
programmerjake:next-pc
libre-chip:master
libre-chip:wip-splitting-reg-alloc
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compare: programmerjake:c52cf12360e21e3524cd3e858a4537f7a34478e3
Branches Tags
programmerjake:next-pc
programmerjake:master
libre-chip:master
libre-chip:wip-splitting-reg-alloc

3 commits
b85019ddd0 ... c52cf12360

Author SHA1 Message Date
Jacob Lifshay
c52cf12360
WIP adding next_pc 2025-11-07 02:38:34 -08:00
Jacob Lifshay
12ef8c63b5
add Serialize/Deserialize impls for CpuConfig 2025-11-07 02:32:38 -08:00
Jacob Lifshay
5433c6c2a7
update Fayalite to 45fea70c to get new features and bug fixes 2025-11-07 02:32:19 -08:00
2 changed files with 14 additions and 11 deletions
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8
Cargo.lock generated
View file

@ -304,7 +304,7 @@ checksum = "e8c02a5121d4ea3eb16a80748c74f5549a5665e4c21333c6098f283870fbdea6"
[[package]] [[package]]
name = "fayalite" name = "fayalite"
version = "0.3.0" version = "0.3.0"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#fbc8ffa5aea6cc76d643880cd21a34993fb1ec4f" source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#45fea70c1841aedbb32377d88c0280c7a83e6208"
dependencies = [ dependencies = [
"base64", "base64",
"bitvec", "bitvec",
@ -331,7 +331,7 @@ dependencies = [
[[package]] [[package]]
name = "fayalite-proc-macros" name = "fayalite-proc-macros"
version = "0.3.0" version = "0.3.0"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#fbc8ffa5aea6cc76d643880cd21a34993fb1ec4f" source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#45fea70c1841aedbb32377d88c0280c7a83e6208"
dependencies = [ dependencies = [
"fayalite-proc-macros-impl", "fayalite-proc-macros-impl",
] ]
@ -339,7 +339,7 @@ dependencies = [
[[package]] [[package]]
name = "fayalite-proc-macros-impl" name = "fayalite-proc-macros-impl"
version = "0.3.0" version = "0.3.0"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#fbc8ffa5aea6cc76d643880cd21a34993fb1ec4f" source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#45fea70c1841aedbb32377d88c0280c7a83e6208"
dependencies = [ dependencies = [
"base16ct", "base16ct",
"num-bigint", "num-bigint",
@ -354,7 +354,7 @@ dependencies = [
[[package]] [[package]]
name = "fayalite-visit-gen" name = "fayalite-visit-gen"
version = "0.3.0" version = "0.3.0"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#fbc8ffa5aea6cc76d643880cd21a34993fb1ec4f" source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#45fea70c1841aedbb32377d88c0280c7a83e6208"
dependencies = [ dependencies = [
"indexmap", "indexmap",
"prettyplease", "prettyplease",

3
crates/cpu/src/next_pc.rs
View file

@ -545,6 +545,7 @@ pub fn next_pc(config: PhantomConst<CpuConfig>) {
sim.write(to_fetch.inner.data, HdlNone()).await; sim.write(to_fetch.inner.data, HdlNone()).await;
}, },
|mut sim: ExternModuleSimulationState, ()| async move { |mut sim: ExternModuleSimulationState, ()| async move {
sim.fork_join_scope(|scope, mut sim: ExternModuleSimulationState| async move {
for step in 0usize.. { for step in 0usize.. {
sim.wait_for_clock_edge(cd.clk).await; sim.wait_for_clock_edge(cd.clk).await;
match ResetSteps::reset_step(state_for_debug, &mut sim, step).await { match ResetSteps::reset_step(state_for_debug, &mut sim, step).await {
@ -553,6 +554,8 @@ pub fn next_pc(config: PhantomConst<CpuConfig>) {
} }
} }
// TODO: finish // TODO: finish
})
.await
}, },
) )
.await; .await;