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base: programmerjake:6026df8d7a173ccc38d6e13359a5c9ea340956e0
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programmerjake:master
programmerjake:decode-and-test-harness
libre-chip:master
libre-chip:wip-splitting-reg-alloc
..
compare: programmerjake:0d69666b00e004b1373d40fcbc8cd9c57de70263
Branches Tags
programmerjake:decode-and-test-harness
programmerjake:master
libre-chip:master
libre-chip:wip-splitting-reg-alloc

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6026df8d7a ... 0d69666b00

6 changed files with 143429 additions and 121419 deletions
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31
crates/cpu/src/rename_execute_retire.rs
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@ -581,15 +581,6 @@ impl MOpInUnitState {
Self::FinishedAndOrCausedCancel => None,
}
}
fn is_completed(self) -> bool {
match self {
Self::NotYetEnqueued => false,
Self::InputsNotReadySpeculative { .. } => false,
Self::InputsReady { .. } => false,
Self::OutputReady { .. } => false,
Self::FinishedAndOrCausedCancel => true,
}
}
}
impl fmt::Debug for MOpInUnitState {
@ -1222,7 +1213,7 @@ impl<C: PhantomConstCpuConfig> RenameExecuteRetireState<C> {
fn space_available_for_unit(&self, unit_index: usize) -> usize {
let mut retval = self.config.get().unit_max_in_flight(unit_index);
for renamed in self.rob.renamed() {
if renamed.unit_index == unit_index && !renamed.mop_in_unit_state.is_completed() {
if renamed.unit_index == unit_index {
let Some(v) = NonZero::new(retval.get() - 1) else {
return 0;
};
@ -1466,21 +1457,11 @@ impl<C: PhantomConstCpuConfig> RenameExecuteRetireState<C> {
);
}
let Some(out_reg_num) = out_reg_num else {
let l2_space_available = self.space_available_for_unit(self.l2_reg_file_unit_index);
let used_unit_out_reg_count = self.rename_table.used_unit_out_reg_count(unit_index);
let unit_out_reg_count = 1 << self.config.get().out_reg_num_width;
let threshold_count = (unit_out_reg_count * 3 / 4).clamp(1, unit_out_reg_count);
let free_l2_reg = self.find_free_l2_reg();
println!(
"try_rename: out_reg_num = None \
l2_space_available={l2_space_available} \
used_unit_out_reg_count={used_unit_out_reg_count} \
threshold_count={threshold_count} \
free_l2_reg={free_l2_reg:?}",
);
if l2_space_available > 0
&& used_unit_out_reg_count >= threshold_count
&& let Some(l2_reg_index) = free_l2_reg
println!("try_rename: out_reg_num = None");
if self.space_available_for_unit(self.l2_reg_file_unit_index) > 0
&& self.rename_table.used_unit_out_reg_count(unit_index)
>= (1 << self.config.get().out_reg_num_width)
&& let Some(l2_reg_index) = self.find_free_l2_reg()
{
println!("try_rename: start L2 store");
let reg_to_free = LFSR31::next_sim(&mut self.lfsr) as usize

24005
crates/cpu/tests/expected/rename_execute_retire_fibonacci_combinatorial.vcd generated
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44273
crates/cpu/tests/expected/rename_execute_retire_fibonacci_non_combinatorial.vcd generated
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56873
crates/cpu/tests/expected/rename_execute_retire_head_n1.vcd generated
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139664
crates/cpu/tests/expected/rename_execute_retire_slow_loop.vcd generated
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2
crates/cpu/tests/rename_execute_retire.rs
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@ -4331,7 +4331,7 @@ fn test_rename_execute_retire_slow_loop() {
};
sim.write_clock(sim.io().cd.clk, false);
sim.write_reset(sim.io().cd.rst, true);
for cycle in 0..350 {
for cycle in 0..600 {
sim.advance_time(SimDuration::from_nanos(500));
println!("clock tick: {cycle}");
sim.write_clock(sim.io().cd.clk, true);