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make LogicalFlagsMOp also copy the dest PRegValue.flags into PRegValue.int_fp

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This commit is contained in:
Jacob Lifshay 2026-01-23 12:06:59 -08:00
parent aa07e24c78
commit d361a2b578
Signed by: programmerjake
SSH key fingerprint: SHA256:HnFTLGpSm4Q4Fj502oCFisjZSoakwEuTsJJMSke63RQ
1 changed files with 22 additions and 12 deletions
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34
crates/cpu/src/instruction.rs
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@ -1473,14 +1473,19 @@ impl<DestReg: Type, SrcRegWidth: Size> LogicalFlagsMOp<DestReg, SrcRegWidth> {
src: impl ToExpr<Type = Array<PRegValue, 3>>, src: impl ToExpr<Type = Array<PRegValue, 3>>,
) -> Expr<PRegValue> { ) -> Expr<PRegValue> {
let this = this.to_expr(); let this = this.to_expr();
let flags = LogicalFlagsMOpImm::flags_operation(
Self::imm(this),
this.lut,
src.to_expr().map(|v| v.flags),
);
#[hdl] #[hdl]
PRegValue { PRegValue {
int_fp: 0u64, int_fp: PRegFlags::fields(flags)
flags: LogicalFlagsMOpImm::flags_operation( .iter()
Self::imm(this), .as_slice()
this.lut, .cast_to_bits()
src.to_expr().map(|v| v.flags), .cast_to_static::<UInt<64>>(),
), flags,
} }
} }
#[hdl] #[hdl]
@ -1489,14 +1494,19 @@ impl<DestReg: Type, SrcRegWidth: Size> LogicalFlagsMOp<DestReg, SrcRegWidth> {
src: impl ToSimValue<Type = Array<PRegValue, 3>>, src: impl ToSimValue<Type = Array<PRegValue, 3>>,
) -> SimValue<PRegValue> { ) -> SimValue<PRegValue> {
let this = this.into_sim_value(); let this = this.into_sim_value();
let flags = LogicalFlagsMOpImm::flags_operation_sim(
Self::imm(&this),
SimValue::into_value(this).lut,
SimValue::into_value(src.into_sim_value()).map(|v| SimValue::into_value(v).flags),
);
#[hdl(sim)] #[hdl(sim)]
PRegValue { PRegValue {
int_fp: 0u64, int_fp: PRegFlags::fields_sim_ref(&flags)
flags: LogicalFlagsMOpImm::flags_operation_sim( .iter()
Self::imm(&this), .as_slice()
SimValue::into_value(this).lut, .cast_to_bits()
SimValue::into_value(src.into_sim_value()).map(|v| SimValue::into_value(v).flags), .cast_to_static::<UInt<64>>(),
), flags,
} }
} }
#[hdl] #[hdl]