wrote out all of next_pc and tests/next_pc

This commit is contained in:
Jacob Lifshay 2025-12-11 00:31:00 -08:00
parent cfd04469ce
commit c87a1b8e1e
Signed by: programmerjake
SSH key fingerprint: SHA256:HnFTLGpSm4Q4Fj502oCFisjZSoakwEuTsJJMSke63RQ
4 changed files with 1871 additions and 703 deletions

View file

@ -78,7 +78,7 @@ const DEMO_ILLEGAL_INSN_TRAP: u64 = 0xFF000000u64;
#[hdl]
struct FetchPipeQueueEntry {
fetch_pc: UInt<64>,
start_pc: UInt<64>,
cycles_left: UInt<8>,
fetch_block_id: UInt<{ FETCH_BLOCK_ID_WIDTH }>,
}
@ -88,7 +88,7 @@ impl FetchPipeQueueEntry {
fn default_sim(self) -> SimValue<Self> {
#[hdl(sim)]
FetchPipeQueueEntry {
fetch_pc: 0u64,
start_pc: 0u64,
cycles_left: 0u8,
fetch_block_id: 0u8,
}
@ -129,7 +129,8 @@ fn mock_fetch_pipe(config: PhantomConst<CpuConfig>) {
sim.resettable(
cd,
async |mut sim| {
sim.write(from_fetch.inner.ready, false).await;
sim.write(from_fetch.fetch.ready, false).await;
sim.write(from_fetch.cancel.ready, false).await;
sim.write(
to_post_decode.inner.data,
to_post_decode.ty().inner.data.HdlNone(),
@ -179,21 +180,21 @@ fn mock_fetch_pipe(config: PhantomConst<CpuConfig>) {
if let Some(front) = queue.front().filter(|v| v.cycles_left.as_int() == 0) {
#[hdl(sim)]
let FetchPipeQueueEntry {
fetch_pc,
start_pc,
cycles_left: _,
fetch_block_id,
} = front;
let fetch_pc = fetch_pc.as_int();
let fetch_end =
(fetch_pc + 1).next_multiple_of(config.get().fetch_width_in_bytes() as u64);
let start_pc = start_pc.as_int();
let end_pc =
(start_pc + 1).next_multiple_of(config.get().fetch_width_in_bytes() as u64);
let insns = to_post_decode.ty().inner.data.HdlSome.insns;
let zeroed_insn = UInt[insns.element().canonical().bit_width()]
.zero()
.cast_bits_to(insns.element());
let mut insns = insns.new_sim(zeroed_insn);
let mut expected_pc = fetch_pc;
let mut expected_pc = start_pc;
// TODO: handle instructions that go past the end of a fetch block
for (pc, insn) in mock_insns.fetch_block(fetch_pc..fetch_end) {
for (pc, insn) in mock_insns.fetch_block(start_pc..end_pc) {
let next_pc = pc + insn.byte_len();
if pc != expected_pc {
break;
@ -226,7 +227,7 @@ fn mock_fetch_pipe(config: PhantomConst<CpuConfig>) {
WipDecodedInsn {
fetch_block_id,
id: next_id.cast_to_static::<UInt<_>>(),
pc: fetch_pc,
pc: start_pc,
size_in_bytes: 0u8.cast_to_static::<UInt<_>>(),
kind: WipDecodedInsnKind.Interrupt(DEMO_ILLEGAL_INSN_TRAP),
},
@ -250,8 +251,9 @@ fn mock_fetch_pipe(config: PhantomConst<CpuConfig>) {
)
.await;
}
sim.write(from_fetch.inner.ready, queue.len() < FETCH_PIPE_QUEUE_SIZE)
sim.write(from_fetch.fetch.ready, queue.len() < FETCH_PIPE_QUEUE_SIZE)
.await;
sim.write(from_fetch.cancel.ready, true).await;
sim.wait_for_clock_edge(cd.clk).await;
if sim.read_past_bool(to_post_decode.inner.ready, cd.clk).await {
#[hdl(sim)]
@ -264,25 +266,31 @@ fn mock_fetch_pipe(config: PhantomConst<CpuConfig>) {
entry.cycles_left = (entry.cycles_left.as_int() - 1u8).to_sim_value();
}
}
if !sim.read_past_bool(from_fetch.inner.ready, cd.clk).await {
continue;
}
// handle cancels before pushing new fetch op
#[hdl(sim)]
if let HdlSome(inner) = sim.read_past(from_fetch.inner.data, cd.clk).await {
#[hdl(sim)]
let NextPcToFetchInterfaceInner {
next_fetch_pc,
fetch_block_id,
in_progress_fetches_to_cancel,
} = &inner;
if let HdlSome(in_progress_fetches_to_cancel) =
sim.read_past(from_fetch.cancel.data, cd.clk).await
{
// cancel in-progress fetches from newest to oldest
for _ in 0..in_progress_fetches_to_cancel.as_int() {
for _ in 0..*in_progress_fetches_to_cancel {
let _ = queue.pop_back();
}
}
if !sim.read_past_bool(from_fetch.fetch.ready, cd.clk).await {
continue;
}
// handle pushing new fetch op after handling cancels
#[hdl(sim)]
if let HdlSome(inner) = sim.read_past(from_fetch.fetch.data, cd.clk).await {
#[hdl(sim)]
let NextPcToFetchInterfaceInner {
start_pc,
fetch_block_id,
} = &inner;
queue.push_back(
#[hdl(sim)]
FetchPipeQueueEntry {
fetch_pc: next_fetch_pc,
start_pc,
cycles_left: FetchPipeQueueEntry::get_next_delay(delay_sequence_index),
fetch_block_id,
},