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add GlobalState to ExecuteToUnitInterface

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This commit is contained in:
Jacob Lifshay 2026-05-24 19:56:14 -07:00
parent ce8519b2db
commit a88009a303
Signed by: programmerjake
SSH key fingerprint: SHA256:HnFTLGpSm4Q4Fj502oCFisjZSoakwEuTsJJMSke63RQ
7 changed files with 715 additions and 22 deletions
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36
crates/cpu/src/rename_execute_retire.rs
View file

@ -14,7 +14,7 @@ use crate::{
UnitNum, UnitOutRegNum, WriteL2RegMOp,
},
next_pc::{CallStackOp, SimValueDefault},
register::PRegValue,
register::{FlagsMode, PRegFlagsPowerISA, PRegValue},
rename_execute_retire::{
rename_table::{RenameTable, RenameTableDebugState, RenameTableEntry, RenameTableUpdate},
reorder_buffer::{ReorderBuffer, ReorderBufferDebugState, RobEntry},
@ -126,6 +126,25 @@ pub struct RetireToNextPcInterface<C: PhantomConstGet<CpuConfig>> {
pub type RenamedMOp<C: PhantomConstGet<CpuConfig>> =
crate::instruction::RenamedMOp<PRegNum<C>, PRegNum<C>>;
#[hdl]
pub struct GlobalState {
pub flags_mode: FlagsMode,
}
impl SimValueDefault for GlobalState {
#[hdl]
fn sim_value_default(self) -> SimValue<Self> {
let Self { flags_mode: _ } = self;
#[hdl(sim)]
Self {
flags_mode: FlagsMode.PowerISA(
#[hdl(sim)]
PRegFlagsPowerISA {},
),
}
}
}
/// Enqueues happen in program order, they are not re-ordered by out-of-order execution.
/// the whole `MOpInstance` is sent again in [`UnitInputsReady`] so Units can just ignore all
/// [`UnitEnqueue`] messages if they don't need to keep track of program order -- so, pure computation
@ -196,6 +215,7 @@ pub struct UnitMOpCantCauseCancel<C: PhantomConstGet<CpuConfig>> {
#[doc = simple_mermaid::mermaid!("rename_execute_retire/unit.mermaid")]
#[hdl(no_static)]
pub struct ExecuteToUnitInterface<C: PhantomConstGet<CpuConfig>> {
pub global_state: GlobalState,
/// Enqueues happen in program order, they are not re-ordered by out-of-order execution.
pub enqueue: ReadyValid<UnitEnqueue<C>>,
/// if [`Self::unit_outputs_ready`] is `false`, then this is always [`HdlNone`]
@ -228,6 +248,7 @@ impl<C: PhantomConstCpuConfig> SimValueDefault for RenameExecuteRetireDebugState
#[hdl]
fn sim_value_default(self) -> SimValue<Self> {
let Self {
global_state,
rename_delayed,
rename_table,
retire_rename_table,
@ -241,6 +262,7 @@ impl<C: PhantomConstCpuConfig> SimValueDefault for RenameExecuteRetireDebugState
let empty_string = SimOnlyValue::new(String::new());
#[hdl(sim)]
Self {
global_state: global_state.sim_value_default(),
rename_delayed: zeroed(rename_delayed),
rename_table: zeroed(rename_table),
retire_rename_table: zeroed(retire_rename_table),
@ -515,6 +537,7 @@ struct RenameDelayedEntry<C: PhantomConstGet<CpuConfig>> {
#[hdl(no_static)]
pub struct RenameExecuteRetireDebugState<C: PhantomConstGet<CpuConfig>> {
global_state: GlobalState,
rename_delayed: ArrayVec<RenameDelayedEntry<C>, TwiceCpuConfigFetchWidth<C>>,
rename_table: RenameTableDebugState<C>,
retire_rename_table: RenameTableDebugState<C>,
@ -531,6 +554,7 @@ pub struct RenameExecuteRetireDebugState<C: PhantomConstGet<CpuConfig>> {
#[derive(Debug)]
struct RenameExecuteRetireState<C: PhantomConstCpuConfig> {
global_state: SimValue<GlobalState>,
rename_delayed: VecDeque<SimValue<RenameDelayedEntry<C>>>,
rename_table: RenameTable<C>,
retire_rename_table: RenameTable<C>,
@ -546,6 +570,7 @@ struct RenameExecuteRetireState<C: PhantomConstCpuConfig> {
impl<C: PhantomConstCpuConfig> RenameExecuteRetireState<C> {
fn new(config: C) -> Self {
Self {
global_state: GlobalState.sim_value_default(),
rename_delayed: VecDeque::with_capacity(TwiceCpuConfigFetchWidth[config]),
rename_table: RenameTable::new(config),
retire_rename_table: RenameTable::new(config),
@ -632,6 +657,7 @@ impl<C: PhantomConstCpuConfig> RenameExecuteRetireState<C> {
state_for_debug: Expr<RenameExecuteRetireDebugState<C>>,
) {
let Self {
global_state,
rename_delayed,
rename_table,
retire_rename_table,
@ -647,6 +673,7 @@ impl<C: PhantomConstCpuConfig> RenameExecuteRetireState<C> {
state_for_debug,
#[hdl(sim)]
RenameExecuteRetireDebugState::<_> {
global_state,
rename_delayed: state_for_debug
.ty()
.rename_delayed
@ -1387,6 +1414,7 @@ impl<C: PhantomConstCpuConfig> RenameExecuteRetireState<C> {
#[hdl]
fn finish_receive_cancel_from_post_decode(&mut self) {
let Self {
global_state: _,
rename_delayed,
rename_table,
retire_rename_table,
@ -1686,6 +1714,7 @@ async fn rename_execute_retire_run(
{
#[hdl]
let ExecuteToUnitInterface::<_> {
global_state,
enqueue,
inputs_ready,
is_no_longer_speculative,
@ -1696,6 +1725,7 @@ async fn rename_execute_retire_run(
cancel_all,
config: _,
} = to_unit;
sim.write(global_state, &state.global_state).await;
sim.write(enqueue.data, state.get_unit_enqueue(unit_index))
.await;
sim.write(inputs_ready, state.get_unit_inputs_ready(unit_index))
@ -1732,6 +1762,7 @@ async fn rename_execute_retire_run(
{
#[hdl]
let ExecuteToUnitInterface::<_> {
global_state: _,
enqueue,
inputs_ready,
is_no_longer_speculative,
@ -1923,6 +1954,7 @@ pub fn rename_execute_retire(config: PhantomConst<CpuConfig>) {
for to_unit in ExecuteToUnitInterfaces::unit_fields(to_units) {
#[hdl]
let ExecuteToUnitInterface::<_> {
global_state,
enqueue,
inputs_ready,
is_no_longer_speculative,
@ -1933,6 +1965,8 @@ pub fn rename_execute_retire(config: PhantomConst<CpuConfig>) {
cancel_all,
config: _,
} = to_unit;
sim.write(global_state, GlobalState.sim_value_default())
.await;
sim.write(
enqueue.data,
#[hdl(sim)]

110
crates/cpu/tests/expected/rename_execute_retire_fibonacci_combinatorial.vcd generated
View file

@ -735,6 +735,15 @@ $upscope $end
$upscope $end
$scope struct to_units $end
$scope struct u0_AluBranch $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 ^CGEk \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 GsdD" \$tag $end
@ -834,6 +843,15 @@ $upscope $end
$var string 1 o,/9H config $end
$upscope $end
$scope struct u1_AluBranch $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 GQ'Q> \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 8c+O\ \$tag $end
@ -933,6 +951,15 @@ $upscope $end
$var string 1 ^h`~v config $end
$upscope $end
$scope struct u2_AluBranch $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 aRx5V \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 2+~8. \$tag $end
@ -1032,6 +1059,15 @@ $upscope $end
$var string 1 (xcO& config $end
$upscope $end
$scope struct u3_LoadStore $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 ?S|U6 \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 @a:}a \$tag $end
@ -1131,6 +1167,15 @@ $upscope $end
$var string 1 xI$mR config $end
$upscope $end
$scope struct u4_TransformedMove $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 T,bm_ \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 R]s+W \$tag $end
@ -1232,6 +1277,15 @@ $upscope $end
$var string 1 J1Kd= config $end
$upscope $end
$scope struct state_for_debug $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 B<sY_ \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct rename_delayed $end
$scope struct elements $end
$scope struct \[0] $end
@ -7535,6 +7589,15 @@ $upscope $end
$upscope $end
$scope module u0_AluBranch $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 Q3.G \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 [C%Hf \$tag $end
@ -7636,6 +7699,15 @@ $upscope $end
$upscope $end
$scope module u1_AluBranch $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 eJlg^ \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 #"r$8 \$tag $end
@ -7737,6 +7809,15 @@ $upscope $end
$upscope $end
$scope module u2_AluBranch $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 GN@do \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 EP<U| \$tag $end
@ -7842,6 +7923,15 @@ $var wire 1 LCUP8 clk $end
$var wire 1 U/A-E rst $end
$upscope $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 N^wWl \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 N;QS\ \$tag $end
@ -8285,6 +8375,15 @@ $var wire 1 %/Ado clk $end
$var wire 1 uH]!m rst $end
$upscope $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 j4FYG \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 qpx\a \$tag $end
@ -9363,6 +9462,7 @@ b0 iXLU`
sAddSub\x20{},\x20rzero,\x20rzero,\x20rzero,\x200x0_i26 `4f=q
b0 J8qAt
sPhantomConst(\"0..=20\") %JRz8
sPowerISA\x20(0) ^CGEk
sHdlNone\x20(0) GsdD"
b0 }:QxN
b0 hh!}]
@ -9412,6 +9512,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) eil|L
0!D)]|
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) o,/9H
sPowerISA\x20(0) GQ'Q>
sHdlNone\x20(0) 8c+O\
b0 PfE*7
b0 !}q}3
@ -9461,6 +9562,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) ^(+@*
07at%k
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ^h`~v
sPowerISA\x20(0) aRx5V
sHdlNone\x20(0) 2+~8.
b0 e.>!d
b0 Pf4v-
@ -9510,6 +9612,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) FM/L}
0]G2vi
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) (xcO&
sPowerISA\x20(0) ?S|U6
sHdlNone\x20(0) @a:}a
b0 ck@eh
b0 4rI|P
@ -9559,6 +9662,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) O}TB$
070$9#
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) xI$mR
sPowerISA\x20(0) T,bm_
sHdlNone\x20(0) R]s+W
b0 esX't
b0 /)"Kk
@ -9609,6 +9713,7 @@ sHdlNone\x20(0) |0hb'
0M"^lQ
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) "_2i-
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) J1Kd=
sPowerISA\x20(0) B<sY_
0D<c#n
b0 e-F>7
b0 EH[m}
@ -13122,6 +13227,7 @@ s\"\" SmX4"
s\"\" y.\2m
s\"\" n?a24
s\"\" F8i).
sPowerISA\x20(0) Q3.G
sHdlNone\x20(0) [C%Hf
b0 %RtTH
b0 8/pV|
@ -13171,6 +13277,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) u2peT
0k,__>
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ^pE+,
sPowerISA\x20(0) eJlg^
sHdlNone\x20(0) #"r$8
b0 EYNKC
b0 <`a(d
@ -13220,6 +13327,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) A<iL;
0{bf:`
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ";FVr
sPowerISA\x20(0) GN@do
sHdlNone\x20(0) EP<U|
b0 /,qQx
b0 g:=mM
@ -13271,6 +13379,7 @@ sHdlNone\x20(0) rWrQI
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) p4_Ao
0LCUP8
1U/A-E
sPowerISA\x20(0) N^wWl
sHdlNone\x20(0) N;QS\
b0 ,m'YK
b0 #zFMy
@ -13560,6 +13669,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
0BqYmm
0%/Ado
1uH]!m
sPowerISA\x20(0) j4FYG
sHdlNone\x20(0) qpx\a
b0 4MnxU
b0 h8|hD

164
crates/cpu/tests/expected/rename_execute_retire_fibonacci_non_combinatorial.vcd generated
View file

@ -735,6 +735,15 @@ $upscope $end
$upscope $end
$scope struct to_units $end
$scope struct u0_AluBranch $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 ^CGEk \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 GsdD" \$tag $end
@ -834,6 +843,15 @@ $upscope $end
$var string 1 o,/9H config $end
$upscope $end
$scope struct u1_AluBranch $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 GQ'Q> \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 8c+O\ \$tag $end
@ -933,6 +951,15 @@ $upscope $end
$var string 1 ^h`~v config $end
$upscope $end
$scope struct u2_AluBranch $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 aRx5V \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 2+~8. \$tag $end
@ -1032,6 +1059,15 @@ $upscope $end
$var string 1 (xcO& config $end
$upscope $end
$scope struct u3_LoadStore $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 ?S|U6 \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 @a:}a \$tag $end
@ -1131,6 +1167,15 @@ $upscope $end
$var string 1 xI$mR config $end
$upscope $end
$scope struct u4_TransformedMove $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 T,bm_ \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 R]s+W \$tag $end
@ -1232,6 +1277,15 @@ $upscope $end
$var string 1 J1Kd= config $end
$upscope $end
$scope struct state_for_debug $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 B<sY_ \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct rename_delayed $end
$scope struct elements $end
$scope struct \[0] $end
@ -7539,6 +7593,15 @@ $var wire 1 ~ge89 clk $end
$var wire 1 1kyC" rst $end
$upscope $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 Q3.G \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 [C%Hf \$tag $end
@ -7638,6 +7701,15 @@ $upscope $end
$var string 1 ^pE+, config $end
$upscope $end
$scope struct debug_state $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 1Rz_e \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct ops $end
$scope struct elements $end
$scope struct \[0] $end
@ -8017,6 +8089,15 @@ $var wire 1 %3;Sp clk $end
$var wire 1 }GG*c rst $end
$upscope $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 eJlg^ \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 #"r$8 \$tag $end
@ -8116,6 +8197,15 @@ $upscope $end
$var string 1 ";FVr config $end
$upscope $end
$scope struct debug_state $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 1~`.z \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct ops $end
$scope struct elements $end
$scope struct \[0] $end
@ -8495,6 +8585,15 @@ $var wire 1 BEBSD clk $end
$var wire 1 ML]/~ rst $end
$upscope $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 GN@do \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 EP<U| \$tag $end
@ -8594,6 +8693,15 @@ $upscope $end
$var string 1 p4_Ao config $end
$upscope $end
$scope struct debug_state $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 d_WoL \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct ops $end
$scope struct elements $end
$scope struct \[0] $end
@ -8973,6 +9081,15 @@ $var wire 1 LCUP8 clk $end
$var wire 1 U/A-E rst $end
$upscope $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 N^wWl \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 N;QS\ \$tag $end
@ -9416,6 +9533,15 @@ $var wire 1 %/Ado clk $end
$var wire 1 uH]!m rst $end
$upscope $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 j4FYG \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 qpx\a \$tag $end
@ -10494,6 +10620,7 @@ b0 iXLU`
sAddSub\x20{},\x20rzero,\x20rzero,\x20rzero,\x200x0_i26 `4f=q
b0 J8qAt
sPhantomConst(\"0..=20\") %JRz8
sPowerISA\x20(0) ^CGEk
sHdlNone\x20(0) GsdD"
b0 }:QxN
b0 hh!}]
@ -10543,6 +10670,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) eil|L
0!D)]|
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) o,/9H
sPowerISA\x20(0) GQ'Q>
sHdlNone\x20(0) 8c+O\
b0 PfE*7
b0 !}q}3
@ -10592,6 +10720,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) ^(+@*
07at%k
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ^h`~v
sPowerISA\x20(0) aRx5V
sHdlNone\x20(0) 2+~8.
b0 e.>!d
b0 Pf4v-
@ -10641,6 +10770,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) FM/L}
0]G2vi
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) (xcO&
sPowerISA\x20(0) ?S|U6
sHdlNone\x20(0) @a:}a
b0 ck@eh
b0 4rI|P
@ -10690,6 +10820,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) O}TB$
070$9#
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) xI$mR
sPowerISA\x20(0) T,bm_
sHdlNone\x20(0) R]s+W
b0 esX't
b0 /)"Kk
@ -10740,6 +10871,7 @@ sHdlNone\x20(0) |0hb'
0M"^lQ
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) "_2i-
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) J1Kd=
sPowerISA\x20(0) B<sY_
0D<c#n
b0 e-F>7
b0 EH[m}
@ -14255,6 +14387,7 @@ s\"\" n?a24
s\"\" F8i).
0~ge89
11kyC"
sPowerISA\x20(0) Q3.G
sHdlNone\x20(0) [C%Hf
b0 %RtTH
b0 8/pV|
@ -14304,6 +14437,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) u2peT
0k,__>
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ^pE+,
sPowerISA\x20(0) 1Rz_e
b0 SeKza
b0 $(}f)
b0 VPYyn
@ -14509,6 +14643,7 @@ sPhantomConst(\"0..=8\") kaY""
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) d$rs<
0%3;Sp
1}GG*c
sPowerISA\x20(0) eJlg^
sHdlNone\x20(0) #"r$8
b0 EYNKC
b0 <`a(d
@ -14558,6 +14693,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) A<iL;
0{bf:`
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ";FVr
sPowerISA\x20(0) 1~`.z
b0 E[Fv@
b0 oKzpD
b0 H,?[}
@ -14763,6 +14899,7 @@ sPhantomConst(\"0..=8\") \8'R-
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) jV<x@
0BEBSD
1ML]/~
sPowerISA\x20(0) GN@do
sHdlNone\x20(0) EP<U|
b0 /,qQx
b0 g:=mM
@ -14812,6 +14949,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) rWrQI
0C>S:u
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) p4_Ao
sPowerISA\x20(0) d_WoL
b0 xo`bv
b0 rqJ]#
b0 0j[<w
@ -15017,6 +15155,7 @@ sPhantomConst(\"0..=8\") 4@cK:
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":3,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) E#:dV
0LCUP8
1U/A-E
sPowerISA\x20(0) N^wWl
sHdlNone\x20(0) N;QS\
b0 ,m'YK
b0 #zFMy
@ -15306,6 +15445,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
0BqYmm
0%/Ado
1uH]!m
sPowerISA\x20(0) j4FYG
sHdlNone\x20(0) qpx\a
b0 4MnxU
b0 h8|hD
@ -16354,6 +16494,30 @@ b1 Nd3$v
1BEBSD
1LCUP8
1%/Ado
0OWS\?
0!D)]|
0?N6#F
0k,__>
1OWS\?
1!D)]|
1?N6#F
1k,__>
0QE<q^
07at%k
0>YMCs
0{bf:`
1QE<q^
17at%k
1>YMCs
1{bf:`
0t_zS6
0]G2vi
0c7WAd
0C>S:u
1t_zS6
1]G2vi
1c7WAd
1C>S:u
#1000000
0spsS)
0OkSP&

90
crates/cpu/tests/expected/rename_execute_retire_head_n1.vcd generated
View file

@ -683,6 +683,15 @@ $upscope $end
$upscope $end
$scope struct to_units $end
$scope struct u0_AluBranch $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 ^CGEk \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 GsdD" \$tag $end
@ -782,6 +791,15 @@ $upscope $end
$var string 1 o,/9H config $end
$upscope $end
$scope struct u1_AluBranch $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 GQ'Q> \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 8c+O\ \$tag $end
@ -881,6 +899,15 @@ $upscope $end
$var string 1 ^h`~v config $end
$upscope $end
$scope struct u2_LoadStore $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 FyT+} \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 !Ax^^ \$tag $end
@ -980,6 +1007,15 @@ $upscope $end
$var string 1 TN{?v config $end
$upscope $end
$scope struct u3_TransformedMove $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 S'#K& \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 ]l$S0 \$tag $end
@ -1081,6 +1117,15 @@ $upscope $end
$var string 1 J1Kd= config $end
$upscope $end
$scope struct state_for_debug $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 B<sY_ \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct rename_delayed $end
$scope struct elements $end
$scope struct \[0] $end
@ -7067,6 +7112,15 @@ $upscope $end
$upscope $end
$scope module u0_AluBranch $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 Q3.G \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 [C%Hf \$tag $end
@ -7168,6 +7222,15 @@ $upscope $end
$upscope $end
$scope module u1_AluBranch $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 eJlg^ \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 #"r$8 \$tag $end
@ -7273,6 +7336,15 @@ $var wire 1 R_bmG clk $end
$var wire 1 z[UFy rst $end
$upscope $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 k/N|/ \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 iE0UB \$tag $end
@ -7716,6 +7788,15 @@ $var wire 1 {Z\hs clk $end
$var wire 1 s7Y>O rst $end
$upscope $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 &blD1 \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 -ayw\ \$tag $end
@ -8760,6 +8841,7 @@ b0 iXLU`
sAddSub\x20{},\x20rzero,\x20rzero,\x20rzero,\x200x0_i26 `4f=q
b0 J8qAt
sPhantomConst(\"0..=20\") %JRz8
sPowerISA\x20(0) ^CGEk
sHdlNone\x20(0) GsdD"
b0 }:QxN
b0 hh!}]
@ -8809,6 +8891,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) eil|L
0!D)]|
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":2,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) o,/9H
sPowerISA\x20(0) GQ'Q>
sHdlNone\x20(0) 8c+O\
b0 PfE*7
b0 !}q}3
@ -8858,6 +8941,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) ^(+@*
07at%k
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":2,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ^h`~v
sPowerISA\x20(0) FyT+}
sHdlNone\x20(0) !Ax^^
b0 2-?=1
b0 W@&|q
@ -8907,6 +8991,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) 65[@U
0(r:@N
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":2,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) TN{?v
sPowerISA\x20(0) S'#K&
sHdlNone\x20(0) ]l$S0
b0 STXG|
b0 "#[9T
@ -8957,6 +9042,7 @@ sHdlNone\x20(0) wO~6L
0F.k*`
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":2,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ]K$*^
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":2,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) J1Kd=
sPowerISA\x20(0) B<sY_
0D<c#n
b0 e-F>7
b0 EH[m}
@ -12313,6 +12399,7 @@ s\"\" SmX4"
s\"\" y.\2m
s\"\" n?a24
s\"\" F8i).
sPowerISA\x20(0) Q3.G
sHdlNone\x20(0) [C%Hf
b0 %RtTH
b0 8/pV|
@ -12362,6 +12449,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) u2peT
0k,__>
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":2,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ^pE+,
sPowerISA\x20(0) eJlg^
sHdlNone\x20(0) #"r$8
b0 EYNKC
b0 <`a(d
@ -12413,6 +12501,7 @@ sHdlNone\x20(0) A<iL;
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":2,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ";FVr
0R_bmG
1z[UFy
sPowerISA\x20(0) k/N|/
sHdlNone\x20(0) iE0UB
b0 tVnu^
b0 v4j5$
@ -12702,6 +12791,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
0[g"k*
0{Z\hs
1s7Y>O
sPowerISA\x20(0) &blD1
sHdlNone\x20(0) -ayw\
b0 4a?1B
b0 #e?g^

90
crates/cpu/tests/expected/rename_execute_retire_save_restore_gprs.vcd generated
View file

@ -683,6 +683,15 @@ $upscope $end
$upscope $end
$scope struct to_units $end
$scope struct u0_AluBranch $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 ^CGEk \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 GsdD" \$tag $end
@ -782,6 +791,15 @@ $upscope $end
$var string 1 o,/9H config $end
$upscope $end
$scope struct u1_AluBranch $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 GQ'Q> \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 8c+O\ \$tag $end
@ -881,6 +899,15 @@ $upscope $end
$var string 1 ^h`~v config $end
$upscope $end
$scope struct u2_LoadStore $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 FyT+} \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 !Ax^^ \$tag $end
@ -980,6 +1007,15 @@ $upscope $end
$var string 1 TN{?v config $end
$upscope $end
$scope struct u3_TransformedMove $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 S'#K& \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 ]l$S0 \$tag $end
@ -1081,6 +1117,15 @@ $upscope $end
$var string 1 J1Kd= config $end
$upscope $end
$scope struct state_for_debug $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 B<sY_ \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct rename_delayed $end
$scope struct elements $end
$scope struct \[0] $end
@ -7067,6 +7112,15 @@ $upscope $end
$upscope $end
$scope module u0_AluBranch $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 Q3.G \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 [C%Hf \$tag $end
@ -7168,6 +7222,15 @@ $upscope $end
$upscope $end
$scope module u1_AluBranch $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 eJlg^ \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 #"r$8 \$tag $end
@ -7273,6 +7336,15 @@ $var wire 1 R_bmG clk $end
$var wire 1 z[UFy rst $end
$upscope $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 k/N|/ \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 iE0UB \$tag $end
@ -7716,6 +7788,15 @@ $var wire 1 {Z\hs clk $end
$var wire 1 s7Y>O rst $end
$upscope $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 &blD1 \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 -ayw\ \$tag $end
@ -8760,6 +8841,7 @@ b0 iXLU`
sAddSub\x20{},\x20rzero,\x20rzero,\x20rzero,\x200x0_i26 `4f=q
b0 J8qAt
sPhantomConst(\"0..=20\") %JRz8
sPowerISA\x20(0) ^CGEk
sHdlNone\x20(0) GsdD"
b0 }:QxN
b0 hh!}]
@ -8809,6 +8891,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) eil|L
0!D)]|
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":2,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) o,/9H
sPowerISA\x20(0) GQ'Q>
sHdlNone\x20(0) 8c+O\
b0 PfE*7
b0 !}q}3
@ -8858,6 +8941,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) ^(+@*
07at%k
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":2,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ^h`~v
sPowerISA\x20(0) FyT+}
sHdlNone\x20(0) !Ax^^
b0 2-?=1
b0 W@&|q
@ -8907,6 +8991,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) 65[@U
0(r:@N
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":2,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) TN{?v
sPowerISA\x20(0) S'#K&
sHdlNone\x20(0) ]l$S0
b0 STXG|
b0 "#[9T
@ -8957,6 +9042,7 @@ sHdlNone\x20(0) wO~6L
0F.k*`
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":2,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ]K$*^
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":2,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) J1Kd=
sPowerISA\x20(0) B<sY_
0D<c#n
b0 e-F>7
b0 EH[m}
@ -12313,6 +12399,7 @@ s\"\" SmX4"
s\"\" y.\2m
s\"\" n?a24
s\"\" F8i).
sPowerISA\x20(0) Q3.G
sHdlNone\x20(0) [C%Hf
b0 %RtTH
b0 8/pV|
@ -12362,6 +12449,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) u2peT
0k,__>
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":2,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ^pE+,
sPowerISA\x20(0) eJlg^
sHdlNone\x20(0) #"r$8
b0 EYNKC
b0 <`a(d
@ -12413,6 +12501,7 @@ sHdlNone\x20(0) A<iL;
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":2,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ";FVr
0R_bmG
1z[UFy
sPowerISA\x20(0) k/N|/
sHdlNone\x20(0) iE0UB
b0 tVnu^
b0 v4j5$
@ -12702,6 +12791,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
0[g"k*
0{Z\hs
1s7Y>O
sPowerISA\x20(0) &blD1
sHdlNone\x20(0) -ayw\
b0 4a?1B
b0 #e?g^

130
crates/cpu/tests/expected/rename_execute_retire_slow_loop.vcd generated
View file

@ -787,6 +787,15 @@ $upscope $end
$upscope $end
$scope struct to_units $end
$scope struct u0_AluBranch $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 ^CGEk \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 GsdD" \$tag $end
@ -886,6 +895,15 @@ $upscope $end
$var string 1 o,/9H config $end
$upscope $end
$scope struct u1_AluBranch $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 GQ'Q> \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 8c+O\ \$tag $end
@ -985,6 +1003,15 @@ $upscope $end
$var string 1 ^h`~v config $end
$upscope $end
$scope struct u2_AluBranch $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 aRx5V \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 2+~8. \$tag $end
@ -1084,6 +1111,15 @@ $upscope $end
$var string 1 (xcO& config $end
$upscope $end
$scope struct u3_AluBranch $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 c2':P \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 cP,km \$tag $end
@ -1183,6 +1219,15 @@ $upscope $end
$var string 1 fI2Uk config $end
$upscope $end
$scope struct u4_LoadStore $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 reQE) \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 o@UX\ \$tag $end
@ -1282,6 +1327,15 @@ $upscope $end
$var string 1 Z]?+2 config $end
$upscope $end
$scope struct u5_TransformedMove $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 f9$P2 \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 `J'BS \$tag $end
@ -1383,6 +1437,15 @@ $upscope $end
$var string 1 J1Kd= config $end
$upscope $end
$scope struct state_for_debug $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 B<sY_ \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct rename_delayed $end
$scope struct elements $end
$scope struct \[0] $end
@ -8003,6 +8066,15 @@ $upscope $end
$upscope $end
$scope module u0_AluBranch $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 Q3.G \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 [C%Hf \$tag $end
@ -8104,6 +8176,15 @@ $upscope $end
$upscope $end
$scope module u1_AluBranch $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 eJlg^ \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 #"r$8 \$tag $end
@ -8205,6 +8286,15 @@ $upscope $end
$upscope $end
$scope module u2_AluBranch $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 GN@do \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 EP<U| \$tag $end
@ -8306,6 +8396,15 @@ $upscope $end
$upscope $end
$scope module u3_AluBranch $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 nxV=B \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 l%cO, \$tag $end
@ -8411,6 +8510,15 @@ $var wire 1 _J$'t clk $end
$var wire 1 R~h'* rst $end
$upscope $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 n8>ag \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 M!ed- \$tag $end
@ -8854,6 +8962,15 @@ $var wire 1 LSE8M clk $end
$var wire 1 `D6%M rst $end
$upscope $end
$scope struct from_execute $end
$scope struct global_state $end
$scope struct flags_mode $end
$var string 1 orJ,: \$tag $end
$scope struct PowerISA $end
$upscope $end
$scope struct X86 $end
$upscope $end
$upscope $end
$upscope $end
$scope struct enqueue $end
$scope struct data $end
$var string 1 zw>>/ \$tag $end
@ -9966,6 +10083,7 @@ b0 iXLU`
sAddSub\x20{},\x20rzero,\x20rzero,\x20rzero,\x200x0_i26 `4f=q
b0 J8qAt
sPhantomConst(\"0..=20\") %JRz8
sPowerISA\x20(0) ^CGEk
sHdlNone\x20(0) GsdD"
b0 }:QxN
b0 hh!}]
@ -10015,6 +10133,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) eil|L
0!D)]|
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":4,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) o,/9H
sPowerISA\x20(0) GQ'Q>
sHdlNone\x20(0) 8c+O\
b0 PfE*7
b0 !}q}3
@ -10064,6 +10183,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) ^(+@*
07at%k
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":4,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ^h`~v
sPowerISA\x20(0) aRx5V
sHdlNone\x20(0) 2+~8.
b0 e.>!d
b0 Pf4v-
@ -10113,6 +10233,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) FM/L}
0]G2vi
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":4,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) (xcO&
sPowerISA\x20(0) c2':P
sHdlNone\x20(0) cP,km
b0 J\[T&
b0 V-Ie/
@ -10162,6 +10283,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) 7R/2&
0JTX?x
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":4,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) fI2Uk
sPowerISA\x20(0) reQE)
sHdlNone\x20(0) o@UX\
b0 k>VXD
b0 bG:p6
@ -10211,6 +10333,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) hUQI@
03h{q/
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":4,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) Z]?+2
sPowerISA\x20(0) f9$P2
sHdlNone\x20(0) `J'BS
b0 #Umg$
b0 u*l#&
@ -10261,6 +10384,7 @@ sHdlNone\x20(0) k2SS&
0?Qs3<
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":4,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) +>o)1
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":4,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) J1Kd=
sPowerISA\x20(0) B<sY_
0D<c#n
b0 e-F>7
b0 EH[m}
@ -13931,6 +14055,7 @@ s\"\" SmX4"
s\"\" y.\2m
s\"\" n?a24
s\"\" F8i).
sPowerISA\x20(0) Q3.G
sHdlNone\x20(0) [C%Hf
b0 %RtTH
b0 8/pV|
@ -13980,6 +14105,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) u2peT
0k,__>
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":4,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ^pE+,
sPowerISA\x20(0) eJlg^
sHdlNone\x20(0) #"r$8
b0 EYNKC
b0 <`a(d
@ -14029,6 +14155,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) A<iL;
0{bf:`
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":4,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) ";FVr
sPowerISA\x20(0) GN@do
sHdlNone\x20(0) EP<U|
b0 /,qQx
b0 g:=mM
@ -14078,6 +14205,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
sHdlNone\x20(0) rWrQI
0C>S:u
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":4,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) p4_Ao
sPowerISA\x20(0) nxV=B
sHdlNone\x20(0) l%cO,
b0 A[D[<
b0 OOnkQ
@ -14129,6 +14257,7 @@ sHdlNone\x20(0) 1WX"Q
sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kind\":\"LoadStore\",\"max_in_flight\":null},{\"kind\":\"TransformedMove\",\"max_in_flight\":null}],\"out_reg_num_width\":4,\"fetch_width\":4,\"max_branches_per_fetch\":1,\"max_fetches_in_flight\":16,\"log2_fetch_width_in_bytes\":3,\"log2_cache_line_size_in_bytes\":6,\"log2_l1_i_cache_line_count\":8,\"l1_i_cache_max_misses_in_flight\":2,\"default_unit_max_in_flight\":8,\"rob_size\":20}) [@u4X
0_J$'t
1R~h'*
sPowerISA\x20(0) n8>ag
sHdlNone\x20(0) M!ed-
b0 %G+MX
b0 o!Zx.
@ -14418,6 +14547,7 @@ sPhantomConst({\"units\":[{\"kind\":\"AluBranch\",\"max_in_flight\":null},{\"kin
0yhGZ]
0LSE8M
1`D6%M
sPowerISA\x20(0) orJ,:
sHdlNone\x20(0) zw>>/
b0 ?k~wf
b0 -ev;7

117
crates/cpu/tests/rename_execute_retire.rs
View file

@ -16,13 +16,13 @@ use cpu::{
ShiftRotateMode, StoreMOp, UnitNum, WriteL2RegMOp,
},
next_pc::CallStackOp,
register::{PRegFlags, PRegFlagsPowerISA, PRegValue},
register::{FlagsMode, PRegFlags, PRegFlagsPowerISA, PRegValue},
rename_execute_retire::{
ExecuteToUnitInterface, MOpId, MOpInstance, NextPcPredictorOp, PostDecodeOutputInterface,
RenamedMOp, RetireToNextPcInterface, RetireToNextPcInterfaceInner, UnitCausedCancel,
UnitEnqueue, UnitFinishCauseCancel, UnitInputsReady, UnitMOpCantCauseCancel,
UnitMOpIsNoLongerSpeculative, UnitOutputReady, rename_execute_retire,
to_unit_interfaces::ExecuteToUnitInterfaces,
ExecuteToUnitInterface, GlobalState, MOpId, MOpInstance, NextPcPredictorOp,
PostDecodeOutputInterface, RenamedMOp, RetireToNextPcInterface,
RetireToNextPcInterfaceInner, UnitCausedCancel, UnitEnqueue, UnitFinishCauseCancel,
UnitInputsReady, UnitMOpCantCauseCancel, UnitMOpIsNoLongerSpeculative, UnitOutputReady,
rename_execute_retire, to_unit_interfaces::ExecuteToUnitInterfaces,
},
unit::{UnitKind, UnitMOp},
util::array_vec::ArrayVec,
@ -1664,10 +1664,18 @@ trait MockExecutionStateTrait: Default {
#[hdl]
fn run_add_sub<C: PhantomConstCpuConfig, SrcCount: KnownSize>(
&mut self,
global_state: &SimValue<GlobalState>,
pc: u64,
mop: &SimValue<AddSubMOp<PRegNum<C>, PRegNum<C>, SrcCount>>,
src_values: &[SimValue<TraceAsString<PRegValue>>; COMMON_MOP_SRC_LEN],
) -> SimValue<TraceAsString<PRegValue>> {
#[hdl(sim)]
let GlobalState { flags_mode } = global_state;
#[hdl(sim)]
match flags_mode {
FlagsMode::PowerISA(_) => {}
_ => todo!("flags_mode={flags_mode:?}"),
}
#[hdl(sim)]
let AddSubMOp::<_, _, _> {
alu_common,
@ -1731,9 +1739,17 @@ trait MockExecutionStateTrait: Default {
#[hdl]
fn run_compare<C: PhantomConstCpuConfig, SrcCount: KnownSize>(
&mut self,
global_state: &SimValue<GlobalState>,
mop: &SimValue<CompareMOp<PRegNum<C>, PRegNum<C>, SrcCount>>,
src_values: &[SimValue<TraceAsString<PRegValue>>; COMMON_MOP_SRC_LEN],
) -> SimValue<TraceAsString<PRegValue>> {
#[hdl(sim)]
let GlobalState { flags_mode } = global_state;
#[hdl(sim)]
match flags_mode {
FlagsMode::PowerISA(_) => {}
_ => todo!("flags_mode={flags_mode:?}"),
}
#[hdl(sim)]
let CompareMOp::<_, _, _> {
common,
@ -1790,9 +1806,17 @@ trait MockExecutionStateTrait: Default {
#[hdl]
fn run_shift_rotate<C: PhantomConstCpuConfig>(
&mut self,
global_state: &SimValue<GlobalState>,
mop: &SimValue<ShiftRotateMOp<PRegNum<C>, PRegNum<C>>>,
src_values: &[SimValue<TraceAsString<PRegValue>>; COMMON_MOP_SRC_LEN],
) -> SimValue<TraceAsString<PRegValue>> {
#[hdl(sim)]
let GlobalState { flags_mode } = global_state;
#[hdl(sim)]
match flags_mode {
FlagsMode::PowerISA(_) => {}
_ => todo!("flags_mode={flags_mode:?}"),
}
#[hdl(sim)]
let ShiftRotateMOp::<_, _> { alu_common, mode } = mop;
#[hdl(sim)]
@ -1972,7 +1996,7 @@ trait MockExecutionStateTrait: Default {
#[hdl]
fn run_branch<C: PhantomConstCpuConfig, SrcCount: KnownSize>(
&mut self,
id: &SimValue<MOpId>,
global_state: &SimValue<GlobalState>,
pc: u64,
fallthrough_pc: u64,
predicted_next_pc: u64,
@ -1984,6 +2008,13 @@ trait MockExecutionStateTrait: Default {
SimValue<NextPcPredictorOp<C>>,
Option<SimValue<UnitCausedCancel<C>>>,
) {
#[hdl(sim)]
let GlobalState { flags_mode } = global_state;
#[hdl(sim)]
match flags_mode {
FlagsMode::PowerISA(_) => {}
_ => todo!("flags_mode={flags_mode:?}"),
}
#[hdl(sim)]
let BranchMOp::<_, _, _> {
common,
@ -2092,6 +2123,7 @@ trait MockExecutionStateTrait: Default {
#[hdl]
fn run_mop<C: PhantomConstCpuConfig>(
&mut self,
global_state: &SimValue<GlobalState>,
mop: &SimValue<MOpInstance<RenamedMOp<C>>>,
src_values: &[SimValue<TraceAsString<PRegValue>>; COMMON_MOP_SRC_LEN],
config: C,
@ -2105,7 +2137,7 @@ trait MockExecutionStateTrait: Default {
#[hdl(sim)]
let MOpInstance::<_> {
fetch_block_id: _,
id,
id: _,
pc,
predicted_next_pc,
size_in_bytes,
@ -2134,14 +2166,14 @@ trait MockExecutionStateTrait: Default {
match mop {
AluBranchMOp::<_, _>::AddSub(mop) => (
Some((
self.run_add_sub(pc.as_int(), mop, src_values),
self.run_add_sub(global_state, pc.as_int(), mop, src_values),
empty_predictor_op(),
)),
None,
),
AluBranchMOp::<_, _>::AddSubI(mop) => (
Some((
self.run_add_sub(pc.as_int(), mop, src_values),
self.run_add_sub(global_state, pc.as_int(), mop, src_values),
empty_predictor_op(),
)),
None,
@ -2156,20 +2188,29 @@ trait MockExecutionStateTrait: Default {
todo!("implement LogicalI")
}
AluBranchMOp::<_, _>::ShiftRotate(mop) => (
Some((self.run_shift_rotate(mop, src_values), empty_predictor_op())),
Some((
self.run_shift_rotate(global_state, mop, src_values),
empty_predictor_op(),
)),
None,
),
AluBranchMOp::<_, _>::Compare(mop) => (
Some((self.run_compare(mop, src_values), empty_predictor_op())),
Some((
self.run_compare(global_state, mop, src_values),
empty_predictor_op(),
)),
None,
),
AluBranchMOp::<_, _>::CompareI(mop) => (
Some((self.run_compare(mop, src_values), empty_predictor_op())),
Some((
self.run_compare(global_state, mop, src_values),
empty_predictor_op(),
)),
None,
),
AluBranchMOp::<_, _>::Branch(mop) => {
let (value, predictor_op, cancel) = self.run_branch(
id,
global_state,
pc.as_int(),
fallthrough_pc,
predicted_next_pc.as_int(),
@ -2181,7 +2222,7 @@ trait MockExecutionStateTrait: Default {
}
AluBranchMOp::<_, _>::BranchI(mop) => {
let (value, predictor_op, cancel) = self.run_branch(
id,
global_state,
pc.as_int(),
fallthrough_pc,
predicted_next_pc.as_int(),
@ -2269,12 +2310,16 @@ impl<C: PhantomConstCpuConfig> MockUnitOp<C> {
}
}
#[hdl]
fn try_run<E: MockExecutionStateTrait>(&mut self, execution_state: &mut E) {
fn try_run<E: MockExecutionStateTrait>(
&mut self,
global_state: &SimValue<GlobalState>,
execution_state: &mut E,
) {
if self.output_ready.is_some() || self.caused_cancel.is_some() {
return;
}
let (output, caused_cancel) =
execution_state.run_mop(&self.mop, &self.src_values, self.config);
execution_state.run_mop(global_state, &self.mop, &self.src_values, self.config);
assert!(output.is_some() || caused_cancel.is_some());
println!("try_run: {:#x}: {:?}", self.mop.pc.as_int(), self.mop.mop);
println!("<- {:?}", self.src_values);
@ -2317,6 +2362,7 @@ impl<C: PhantomConstCpuConfig> MockUnitOp<C> {
#[hdl(no_static)]
struct MockUnitDebugState<C: PhantomConstGet<CpuConfig>, E> {
global_state: GlobalState,
ops: ArrayVec<MockUnitOpDebugState<C>, CpuConfigMaxUnitMaxInFlight<C>>,
execution_state: E,
config: C,
@ -2324,6 +2370,7 @@ struct MockUnitDebugState<C: PhantomConstGet<CpuConfig>, E> {
#[derive(Debug)]
struct MockUnitState<C: PhantomConstCpuConfig, E> {
global_state: SimValue<GlobalState>,
ops: BTreeMap<SimValue<MOpId>, MockUnitOp<C>>,
execution_state: E,
config: C,
@ -2331,8 +2378,14 @@ struct MockUnitState<C: PhantomConstCpuConfig, E> {
}
impl<C: PhantomConstCpuConfig, E: MockExecutionStateTrait> MockUnitState<C, E> {
fn new(execution_state: E, config: C, unit_index: usize) -> Self {
fn new(
global_state: SimValue<GlobalState>,
execution_state: E,
config: C,
unit_index: usize,
) -> Self {
Self {
global_state,
ops: BTreeMap::new(),
execution_state,
config,
@ -2342,6 +2395,7 @@ impl<C: PhantomConstCpuConfig, E: MockExecutionStateTrait> MockUnitState<C, E> {
#[hdl]
fn debug_state(&self) -> SimValue<MockUnitDebugState<C, E::DebugState>> {
let Self {
global_state,
ops,
execution_state,
config,
@ -2351,6 +2405,7 @@ impl<C: PhantomConstCpuConfig, E: MockExecutionStateTrait> MockUnitState<C, E> {
let ret_ty = MockUnitDebugState[*config][execution_state.ty()];
#[hdl(sim)]
MockUnitDebugState::<_, _> {
global_state,
ops: ret_ty
.ops
.from_iter_sim(
@ -2458,7 +2513,7 @@ impl<C: PhantomConstCpuConfig, E: MockExecutionStateTrait> MockUnitState<C, E> {
caused_cancel: None,
config: self.config,
};
op.try_run(&mut self.execution_state);
op.try_run(&self.global_state, &mut self.execution_state);
self.ops.insert(op.mop.id.clone(), op);
}
#[hdl]
@ -2469,6 +2524,7 @@ impl<C: PhantomConstCpuConfig, E: MockExecutionStateTrait> MockUnitState<C, E> {
}
fn cancel_all(&mut self) {
let Self {
global_state: _,
ops,
execution_state: _,
config: _,
@ -2502,6 +2558,7 @@ fn mock_unit<#[hdl(skip)] E: MockExecutionStateTrait>(
async |mut sim| {
#[hdl]
let ExecuteToUnitInterface::<_> {
global_state: _,
enqueue,
inputs_ready: _,
is_no_longer_speculative: _,
@ -2536,6 +2593,7 @@ fn mock_unit<#[hdl(skip)] E: MockExecutionStateTrait>(
debug_state,
#[hdl(sim)]
MockUnitDebugState::<_, _> {
global_state: zeroed(GlobalState),
ops: zeroed(debug_state.ty().ops),
execution_state: SimValue::into_bundle(E::zeroed_debug_state()),
config,
@ -2568,11 +2626,17 @@ fn mock_unit<#[hdl(skip)] E: MockExecutionStateTrait>(
unit_index: usize,
mut sim: ExternModuleSimulationState,
) {
let mut state = MockUnitState::new(execution_state, config, unit_index);
let mut state = MockUnitState::new(
sim.read(from_execute.global_state).await,
execution_state,
config,
unit_index,
);
loop {
{
#[hdl]
let ExecuteToUnitInterface::<_> {
global_state: _,
enqueue,
inputs_ready: _,
is_no_longer_speculative: _,
@ -2598,6 +2662,7 @@ fn mock_unit<#[hdl(skip)] E: MockExecutionStateTrait>(
{
#[hdl]
let ExecuteToUnitInterface::<_> {
global_state,
enqueue: _, // we ignore enqueues since we don't need to track order for these instructions
inputs_ready,
is_no_longer_speculative,
@ -2608,6 +2673,7 @@ fn mock_unit<#[hdl(skip)] E: MockExecutionStateTrait>(
cancel_all,
config: _,
} = from_execute;
state.global_state = sim.read_past(global_state, cd.clk).await;
#[hdl(sim)]
if let HdlSome(inputs_ready) = sim.read_past(inputs_ready, cd.clk).await {
state.handle_inputs_ready(inputs_ready);
@ -2664,6 +2730,7 @@ fn mock_combinational_unit<#[hdl(skip)] E: MockExecutionStateTrait>(
let (from_execute, config, unit_index) = args;
#[hdl]
let ExecuteToUnitInterface::<_> {
global_state: _,
enqueue,
inputs_ready: _,
is_no_longer_speculative: _,
@ -2707,6 +2774,7 @@ fn mock_combinational_unit<#[hdl(skip)] E: MockExecutionStateTrait>(
loop {
#[hdl]
let ExecuteToUnitInterface::<_> {
global_state,
enqueue,
inputs_ready,
is_no_longer_speculative: _, // we don't care about being speculative for these instructions
@ -2718,7 +2786,8 @@ fn mock_combinational_unit<#[hdl(skip)] E: MockExecutionStateTrait>(
config: _,
} = from_execute;
sim.write(enqueue.ready, true).await; // we ignore enqueues since we don't need to track order for these instructions
let mut state = MockUnitState::new(E::default(), config, unit_index);
let global_state = sim.read(global_state).await;
let mut state = MockUnitState::new(global_state, E::default(), config, unit_index);
#[hdl(sim)]
if let HdlSome(inputs_ready) = sim.read(inputs_ready).await {
state.handle_inputs_ready(inputs_ready);
@ -3141,6 +3210,7 @@ fn mock_l2_reg_file_unit(config: PhantomConst<CpuConfig>, unit_index: usize) {
async |mut sim| {
#[hdl]
let ExecuteToUnitInterface::<_> {
global_state: _,
enqueue,
inputs_ready: _,
is_no_longer_speculative: _,
@ -3202,6 +3272,7 @@ fn mock_l2_reg_file_unit(config: PhantomConst<CpuConfig>, unit_index: usize) {
{
#[hdl]
let ExecuteToUnitInterface::<_> {
global_state: _,
enqueue,
inputs_ready: _,
is_no_longer_speculative: _,
@ -3225,6 +3296,7 @@ fn mock_l2_reg_file_unit(config: PhantomConst<CpuConfig>, unit_index: usize) {
{
#[hdl]
let ExecuteToUnitInterface::<_> {
global_state: _,
enqueue,
inputs_ready,
is_no_longer_speculative,
@ -3821,6 +3893,7 @@ fn mock_load_store_unit<#[hdl(skip)] MI: MakeInsns>(
async |mut sim| {
#[hdl]
let ExecuteToUnitInterface::<_> {
global_state: _,
enqueue,
inputs_ready: _,
is_no_longer_speculative: _,
@ -3900,6 +3973,7 @@ fn mock_load_store_unit<#[hdl(skip)] MI: MakeInsns>(
{
#[hdl]
let ExecuteToUnitInterface::<_> {
global_state: _,
enqueue,
inputs_ready: _,
is_no_longer_speculative: _,
@ -3925,6 +3999,7 @@ fn mock_load_store_unit<#[hdl(skip)] MI: MakeInsns>(
{
#[hdl]
let ExecuteToUnitInterface::<_> {
global_state: _,
enqueue,
inputs_ready,
is_no_longer_speculative,