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working on reg_alloc -- wire up free_regs_tracker.alloc_out

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This commit is contained in:
Jacob Lifshay 2025-01-15 19:47:00 -08:00
parent 9781f1f4c5
commit 88eff5952b
Signed by: programmerjake
SSH key fingerprint: SHA256:HnFTLGpSm4Q4Fj502oCFisjZSoakwEuTsJJMSke63RQ
4 changed files with 2274 additions and 1866 deletions
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19
crates/cpu/src/reg_alloc.rs
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@ -155,9 +155,20 @@ pub fn reg_alloc(config: &CpuConfig) {
unit_free_regs_tracker.free_in[0].data,
HdlOption[UInt[config.out_reg_num_width]].uninit(), // FIXME: just for debugging
);
connect(
unit_free_regs_tracker.alloc_out[0].ready,
Bool.uninit(), // FIXME: just for debugging
);
connect(unit_free_regs_tracker.alloc_out[0].ready, false);
for fetch_index in 0..config.fetch_width.get() {
#[hdl]
if let HdlNone = unit_free_regs_tracker.alloc_out[0].data {
// must come after to override connects in loops above
connect(available_units[fetch_index][unit_index], false);
}
#[hdl]
if let HdlSome(unit_num) = selected_unit_nums[fetch_index] {
#[hdl]
if unit_num.value.cmp_eq(unit_index) {
connect(unit_free_regs_tracker.alloc_out[0].ready, true);
}
}
}
}
}