forked from libre-chip/cpu
fix queueing errors
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parent
8ab63f3c6a
commit
84e4fde512
SSH key fingerprint:
SHA256:HnFTLGpSm4Q4Fj502oCFisjZSoakwEuTsJJMSke63RQ
3 changed files with 20332 additions and 15680 deletions
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@ -12,7 +12,11 @@ use cpu::{
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unit::UnitKind,
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util::array_vec::ArrayVec,
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};
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use fayalite::{prelude::*, sim::vcd::VcdWriterDecls, util::RcWriter};
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use fayalite::{
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prelude::*,
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sim::vcd::VcdWriterDecls,
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util::{DebugAsDisplay, RcWriter},
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};
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use std::{
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cell::Cell,
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collections::{BTreeMap, BTreeSet, VecDeque},
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@ -565,13 +569,31 @@ impl MockExecuteState {
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#[hdl]
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fn try_retire(
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&mut self,
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) -> Option<Result<SimValue<RetireToNextPcInterfacePerInsn<PhantomConst<CpuConfig>>>, String>>
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{
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) -> Option<(
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SimValue<RetireToNextPcInterfacePerInsn<PhantomConst<CpuConfig>>>,
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Result<(), String>,
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)> {
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if self.queue.front()?.cycles_left.as_int() != 0 {
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return None;
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}
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let entry = self.queue.pop_front()?;
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Some(self.do_retire(entry))
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let id = entry.insn.id.clone();
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Some(match self.do_retire(entry) {
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Ok(v) => (v, Ok(())),
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Err(e) => (
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#[hdl(sim)]
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RetireToNextPcInterfacePerInsn::<_> {
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id,
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next_pc: u64::from_be_bytes(*b"ErrError"),
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call_stack_op: #[hdl(sim)]
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CallStackOp::None(),
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cond_br_taken: #[hdl(sim)]
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HdlNone(),
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config: self.config,
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},
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Err(e),
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),
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})
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}
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fn space_available(&self) -> usize {
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EXECUTE_RETIRE_PIPE_QUEUE_SIZE.saturating_sub(self.queue.len())
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@ -621,6 +643,11 @@ fn mock_execute_retire_pipe(config: PhantomConst<CpuConfig>) {
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retire_output.ty().inner.data.HdlNone(),
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)
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.await;
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sim.write(
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retire_output.next_insn_ids,
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retire_output.next_insn_ids.ty().new_sim(0_hdl_u12),
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)
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.await;
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sim.write(
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queue_debug,
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queue_debug
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@ -672,30 +699,21 @@ fn mock_execute_retire_pipe(config: PhantomConst<CpuConfig>) {
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let mut sim_queue = queue_debug
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.ty()
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.new_sim(ExecuteRetirePipeQueueEntry.default_sim());
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let mut next_insn_ids = retire_output.next_insn_ids.ty().new_sim(0_hdl_u12);
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for entry in &state.queue {
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ArrayVec::try_push_sim(&mut sim_queue, entry)
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.ok()
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.expect("queue is known to be small enough");
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let _ = ArrayVec::try_push_sim(&mut next_insn_ids, &entry.insn.id);
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}
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sim.write(queue_debug, sim_queue).await;
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sim.write(retire_output.next_insn_ids, next_insn_ids).await;
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let mut retiring = retire_vec_ty.new_sim(&empty_retire_insn);
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let mut peek_state = state.clone();
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while let Some(peek_retire) = peek_state.try_retire() {
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if peek_retire.is_err() && **ArrayVec::len_sim(&retiring) > 0 {
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while let Some((peek_retire, result)) = peek_state.try_retire() {
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if result.is_err() && **ArrayVec::len_sim(&retiring) > 0 {
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break;
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}
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let peek_retire = peek_retire.unwrap_or_else(|_| {
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#[hdl(sim)]
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RetireToNextPcInterfacePerInsn::<_> {
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id: 0_hdl_u12,
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next_pc: u64::from_be_bytes(*b"ErrError"),
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call_stack_op: #[hdl(sim)]
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CallStackOp::None(),
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cond_br_taken: #[hdl(sim)]
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HdlNone(),
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config,
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}
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});
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let Ok(_) = ArrayVec::try_push_sim(&mut retiring, peek_retire) else {
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break;
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};
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@ -723,11 +741,22 @@ fn mock_execute_retire_pipe(config: PhantomConst<CpuConfig>) {
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)
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.await;
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sim.wait_for_clock_edge(cd.clk).await;
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println!(
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"Dump mock execute retire pipe queue: {:#?}",
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Vec::from_iter(state.queue.iter().map(|v| {
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DebugAsDisplay(format!(
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"fid={:#x} id={} pc={:#x}",
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v.insn.fetch_block_id.as_int(),
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v.insn.id,
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v.insn.pc.as_int(),
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))
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}))
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);
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if sim.read_past_bool(retire_output.inner.ready, cd.clk).await {
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for _ in 0..**ArrayVec::len_sim(&retiring) {
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match state.try_retire() {
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Some(Ok(_)) => {}
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Some(Err(e)) => panic!("retire error: {e}"),
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Some((_, Ok(_))) => {}
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Some((_, Err(e))) => panic!("retire error: {e}"),
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None => unreachable!(),
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}
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}
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@ -737,7 +766,7 @@ fn mock_execute_retire_pipe(config: PhantomConst<CpuConfig>) {
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&mut new_insns,
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*sim.read_past(from_post_decode.ready, cd.clk).await,
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);
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for insn in ArrayVec::elements_sim_ref(&new_insns) {
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for insn in dbg!(ArrayVec::elements_sim_ref(&new_insns)) {
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state.start(insn, delay_sequence_index);
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}
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}
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@ -803,7 +832,7 @@ fn test_next_pc() {
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config.fetch_width = NonZeroUsize::new(2).unwrap();
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let m = dut(PhantomConst::new_sized(config));
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let mut sim = Simulation::new(m);
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let mut writer = RcWriter::default();
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let writer = RcWriter::default();
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sim.add_trace_writer(VcdWriterDecls::new(writer.clone()));
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struct DumpVcdOnDrop {
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writer: Option<RcWriter>,
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@ -823,6 +852,7 @@ fn test_next_pc() {
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sim.write_reset(sim.io().cd.rst, true);
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for _cycle in 0..300 {
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sim.advance_time(SimDuration::from_nanos(500));
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println!("clock tick");
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sim.write_clock(sim.io().cd.clk, true);
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sim.advance_time(SimDuration::from_nanos(500));
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sim.write_clock(sim.io().cd.clk, false);
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