forked from libre-chip/cpu
tests/units_formal::test_power_isa_add_formal: formal proof actually starts, though it fails BMC
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70bd4ae851
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1bc59716c5
1 changed files with 16 additions and 6 deletions
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@ -28,9 +28,7 @@ use std::num::NonZero;
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#[hdl_module]
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fn formal_harness(config: PhantomConst<CpuConfig>) {
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#[hdl]
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let cd: ClockDomain = m.output();
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connect(cd.clk, fayalite::formal::formal_global_clock());
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connect(cd.rst, fayalite::formal::formal_reset().to_reset());
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let cd: ClockDomain = m.input();
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#[hdl]
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let input: DecodeAndRunSingleInsnInput<
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@ -99,9 +97,21 @@ fn formal_harness(config: PhantomConst<CpuConfig>) {
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#[hdl_module]
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fn check_power_isa_add_formal(config: PhantomConst<CpuConfig>) {
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#[hdl]
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let clk: Clock = m.input();
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#[hdl]
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let cd = wire();
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connect(
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cd,
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#[hdl]
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ClockDomain {
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clk,
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rst: formal_reset().to_reset(),
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},
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);
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#[hdl]
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let harness = instance(formal_harness(config));
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let cd = harness.cd;
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connect(harness.cd, cd);
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#[hdl]
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let DecodeAndRunSingleInsnInput::<_, _> {
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decoder_input,
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@ -208,11 +218,11 @@ fn test_power_isa_add_formal() {
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vec![UnitConfig::new(UnitKind::AluBranch)],
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NonZero::new(20).unwrap(),
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));
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let dut = check_power_isa_add_formal(config);
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let m = check_power_isa_add_formal(config);
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println!("starting assert formal");
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assert_formal(
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"test_power_isa_add_formal",
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dut,
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m,
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FormalMode::Prove,
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10,
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None,
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