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allow literals to be false in model validation - we can't enforce lack of propagation after internalizing literals, especially if literals are repeated (modulo permutation of equality)

Signed-off-by: Nikolaj Bjorner <nbjorner@microsoft.com>
This commit is contained in:
Nikolaj Bjorner 2026-04-02 12:51:47 -07:00
parent 3629cd9447
commit e59ee306e9
2 changed files with 7 additions and 11 deletions

View file

@ -702,16 +702,11 @@ namespace smt {
break;
case l_false:
// this should not happen because nielsen checks for this before returning a satisfying path.
IF_VERBOSE(0, verbose_stream()
IF_VERBOSE(1, verbose_stream()
<< "nseq final_check: nielsen assumption " << c.fml << " is false\n";);
ctx.force_phase(lit);
if (!was_internalized) {
has_undef = true;
ctx.force_phase(lit);
break;
}
TRACE(seq, tout << "assigned to false: " << c.fml << "\n");
UNREACHABLE();
has_undef = true;
ctx.force_phase(lit);
break;
}
}