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fix #4834, regression after delay-propagating disequality axioms
Signed-off-by: Nikolaj Bjorner <nbjorner@microsoft.com>
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1 changed files with 4 additions and 2 deletions
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@ -1483,8 +1483,10 @@ namespace smt {
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for (unsigned idx = 0; idx < sz; idx++) {
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for (unsigned idx = 0; idx < sz; idx++) {
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literal bit1 = m_bits[v1][idx];
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literal bit1 = m_bits[v1][idx];
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literal bit2 = m_bits[v2][idx];
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literal bit2 = m_bits[v2][idx];
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CTRACE("bv_bug", bit1 == ~bit2, display_var(tout, v1); display_var(tout, v2); tout << "idx: " << idx << "\n";);
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if (bit1 == ~bit2) {
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SASSERT(bit1 != ~bit2);
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add_new_diseq_axiom(v1, v2, idx);
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return;
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}
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lbool val1 = ctx.get_assignment(bit1);
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lbool val1 = ctx.get_assignment(bit1);
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lbool val2 = ctx.get_assignment(bit2);
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lbool val2 = ctx.get_assignment(bit2);
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TRACE("bv", tout << "merge v" << v1 << " " << bit1 << ":= " << val1 << " " << bit2 << ":= " << val2 << "\n";);
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TRACE("bv", tout << "merge v" << v1 << " " << bit1 << ":= " << val1 << " " << bit2 << ":= " << val2 << "\n";);
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