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Reduce difference logic solver to min cost flow

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Anh-Dung Phan 2013-10-25 17:42:03 -07:00
parent ebed5fa037
commit 532c345fd1
5 changed files with 152 additions and 65 deletions
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14
src/smt/diff_logic.h
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@ -932,23 +932,27 @@ public:
}
// Return true if there is an edge source --> target.
// If there is such edge, return it in parameter e.
bool get_edge(dl_var source, dl_var target, edge & e) {
// If there is such edge, return its edge_id in parameter id.
bool get_edge_id(dl_var source, dl_var target, edge_id & id) {
edge_id_vector & edges = m_out_edges[source];
typename edge_id_vector::iterator it = edges.begin();
typename edge_id_vector::iterator end = edges.end();
bool found = false;
for (; it != end; ++it) {
edge_id e_id = *it;
edge & e0 = m_edges[e_id];
if (e0.is_enabled() && e0.get_target() == target && !found) {
e = e0;
edge & e = m_edges[e_id];
if (e.is_enabled() && e.get_target() == target && !found) {
id = e_id;
found = true;
}
}
return found;
}
edges & get_all_edges() {
return m_edges;
}
template<typename Functor>
void enumerate_edges(dl_var source, dl_var target, Functor& f) {
edge_id_vector & edges = m_out_edges[source];