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yosys/passes/techmap
2022-03-28 15:51:04 +01:00
..
abc.cc abc: Fix {I} and {P} substitution 2022-02-23 18:54:28 +11:00
abc9.cc abc9: add flow3mfs script 2022-02-10 18:28:35 +00:00
abc9_exe.cc
abc9_ops.cc abc9_ops: Also derive blackboxes with timing info 2022-03-24 14:36:07 +00:00
aigmap.cc
alumacc.cc
attrmap.cc
attrmvcp.cc
bmuxmap.cc Add $bmux and $demux cells. 2022-01-28 23:34:41 +01:00
clkbufmap.cc
deminout.cc
demuxmap.cc Add $bmux and $demux cells. 2022-01-28 23:34:41 +01:00
dffinit.cc
dfflegalize.cc dfflegalize: Refactor, add aldff support. 2021-10-27 14:14:01 +02:00
dfflibmap.cc
dffunmap.cc FfData: some refactoring. 2021-10-07 04:24:06 +02:00
extract.cc Add v2 memory cells. 2021-08-11 13:34:10 +02:00
extract_counter.cc
extract_fa.cc Fix deadname SVN links 2021-06-09 12:44:37 +02:00
extract_reduce.cc Change implicit conversions from bool to Sig* to explicit. 2021-10-21 20:20:31 +02:00
extractinv.cc
filterlib.cc
flatten.cc flatten: Keep sigmap around between flatten_cell invocations. 2021-11-02 13:18:15 +01:00
flowmap.cc
hilomap.cc
insbuf.cc
iopadmap.cc Correct a typo in the manual 2022-02-02 21:14:38 +10:00
libparse.cc Fix deadname SVN links 2021-06-09 12:44:37 +02:00
libparse.h
lut2mux.cc
maccmap.cc
Makefile.inc Add $bmux and $demux cells. 2022-01-28 23:34:41 +01:00
muxcover.cc
nlutmap.cc
pmuxtree.cc
shregmap.cc
simplemap.cc Add $bmux and $demux cells. 2022-01-28 23:34:41 +01:00
simplemap.h simplemap: refactor to use FfData. 2021-10-02 03:24:57 +02:00
techmap.cc verilog: use derived module info to elaborate cell connections 2021-10-25 18:25:50 -07:00
tribuf.cc
zinit.cc FfData: some refactoring. 2021-10-07 04:24:06 +02:00