Martin Povišer fedd12261f booth: Move away from explicit Wire pointers ... To represent intermediate signals use the `SigBit`/`SigSpec` classes as is customary in the Yosys codebase. Do not pass around `Wire` pointers unless we have special reason to.		2023-09-25 14:50:41 +02:00
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cmds	Speed up the autoname pass by 3x. (#3945)	2023-09-21 09:46:49 +00:00
equiv	Merge pull request #3126 from georgerennie/equiv_make_assertions	2023-02-14 17:15:55 +01:00
fsm	add option to fsm_detect to ignore self-resetting	2023-01-30 16:12:53 +01:00
hierarchy	Small bugfix in uniquify pass	2022-12-21 10:41:48 +01:00
memory	memlib.md: Fix typo	2023-09-04 17:38:35 +02:00
opt	dft_tag: Implement $overwrite_tag and $original_tag	2023-09-13 11:32:36 +02:00
pmgen	Fitting help messages to 80 character width	2022-08-24 10:40:57 +12:00
proc	proc_clean: only consider fully-defined switch operands too.	2023-08-12 02:46:31 +02:00
sat	Merge pull request #3915 from povik/sim-print	2023-09-11 17:03:59 +02:00
techmap	booth: Move away from explicit Wire pointers	2023-09-25 14:50:41 +02:00
tests	Add $bmux and $demux cells.	2022-01-28 23:34:41 +01:00