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aiger
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tests: aiger test for wire->start_offset != 0
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2020-05-02 10:00:32 -07:00 |
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arch
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techmap/shift_shiftx: Remove the "shiftx2mux" special path.
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2020-08-20 12:44:09 +02:00 |
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asicworld
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bram
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errors
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fsm
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tests: fsm to use a randomly-generated seed
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2020-04-24 14:31:33 -07:00 |
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hana
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liberty
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dfflibmap: Refactor to use dfflegalize internally.
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2020-07-09 18:51:03 +02:00 |
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lut
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memfile
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Added 'set -e' into tests/memfile/run-test.sh
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2020-02-06 10:45:40 -03:00 |
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memories
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opt
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Merge pull request #2344 from YosysHQ/mwk/opt_share-fixes
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2020-08-20 16:24:53 +02:00 |
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opt_share
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proc
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proc_clean: fix order of switch insertion.
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2019-08-19 16:44:23 +00:00 |
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realmath
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rpc
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rpc test: make frontend listen before launching yosys & introduce safeguard if yosys errors
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2020-03-06 15:29:01 +01:00 |
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sat
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satgen: Add support for dffe, sdff, sdffe, sdffce cells.
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2020-07-24 03:19:21 +02:00 |
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select
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Merge pull request #1949 from YosysHQ/eddie/select_blackbox
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2020-04-22 15:35:05 -07:00 |
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share
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simple
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Merge pull request #2339 from zachjs/display-format-0s
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2020-08-18 17:39:01 +02:00 |
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simple_abc9
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abc9: test to use box file instead of auto
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2020-05-14 10:33:56 -07:00 |
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smv
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sva
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svinterfaces
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svtypes
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Merge pull request #2122 from PeterCrozier/struct_array2
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2020-08-19 17:58:37 +02:00 |
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techmap
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Merge pull request #2347 from YosysHQ/mwk/techmap-shift-fixes
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2020-08-20 16:25:56 +02:00 |
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tools
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Replace opt_rmdff with opt_dff.
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2020-08-07 13:21:03 +02:00 |
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unit
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various
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Merge pull request #2328 from YosysHQ/mwk/opt_dff-cleanup
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2020-08-20 16:21:58 +02:00 |
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verilog
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Merge pull request #2080 from YosysHQ/eddie/fix_test_warnings
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2020-06-03 08:37:07 -07:00 |
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vloghtb
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