3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-10 11:17:09 +00:00
yosys/backends/firrtl
Jim Lawson fc1c9aa11f Update cells supported for verilog to FIRRTL conversion.
Issue warning messages for missing parameterized modules and attempts to set initial values.
Replace simple "if (cell-type)" with "else if" chain.
Fix FIRRTL shift handling.
Add support for parameterized modules, $shift, $shiftx.
Handle default output file.
Deal with no top module.
Automatically run pmuxtree pass.
Allow EXTRA_FLAGS and SEED parameters to be set in the environment for tests/tools/autotest.mk.
Support FIRRTL regression testing in tests/tools/autotest.sh
Add xfirrtl files to test directories to exclude files from FIRRTL regression tests that are known to fail.
2019-02-15 11:14:17 -08:00
..
.gitignore Progress in FIRRTL back-end 2016-11-18 00:32:35 +01:00
firrtl.cc Update cells supported for verilog to FIRRTL conversion. 2019-02-15 11:14:17 -08:00
Makefile.inc Added first draft of FIRRTL back-end 2016-11-17 23:36:47 +01:00
test.sh More progress on Firrtl backend. 2017-02-13 11:17:53 -08:00
test.v More progress on Firrtl backend. 2017-02-13 11:17:53 -08:00