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aiger
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read_aiger: Fix incorrect read of binary Aiger without outputs
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2024-04-29 14:06:58 +01:00 |
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arch
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add min_ce_use and min_srst_use parameters
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2024-08-15 17:50:36 +02:00 |
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asicworld
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bind
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blif
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bram
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cxxrtl
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cxxxrtl: fix use of format specifiers in test
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2024-06-11 07:22:39 +01:00 |
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errors
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fmt
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fsm
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functional
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functional tests: run from make tests but not smtlib/rkt tests
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2024-09-04 10:30:08 +01:00 |
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hana
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liberty
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Extend liberty tests
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2024-08-13 18:47:36 +02:00 |
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lut
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memfile
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memlib
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Move parameters to module declaration
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2024-04-08 12:44:37 +02:00 |
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memories
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Move parameters to module declaration
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2024-04-08 12:44:37 +02:00 |
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opt
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peepopt: avoid shift-amount underflow
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2024-06-13 23:30:07 +02:00 |
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opt_share
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proc
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proc_dff: add tests
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2024-08-28 16:24:47 +01:00 |
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realmath
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rpc
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sat
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Add support for $dimensions and $unpacked_dimensions
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2024-02-11 11:26:52 -05:00 |
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select
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share
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sim
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simple
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write_verilog: don't assign to a reg.
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2024-04-03 13:06:45 +02:00 |
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simple_abc9
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smv
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sva
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tests/sva: Skip sva tests that use SBY until SBY is compatible again
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2024-03-05 14:37:33 +01:00 |
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svinterfaces
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svtypes
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fix test for verific
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2024-02-12 09:19:58 +01:00 |
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techmap
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Adjust operation naming in aigmap test
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2024-09-17 13:55:58 +02:00 |
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tools
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unit
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Changes in libs, passes and tests Makefiles. LDLIBS -> LIBS. LDFLAGS -> LINKFLAGS. CXX is clang++ or g++, not clang and gcc
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2024-02-25 17:23:56 +01:00 |
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various
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Start an 'aiger2' backend
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2024-09-17 13:55:58 +02:00 |
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verific
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Add left and right bound properties to wire. Add test. Fix printing
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2024-09-10 12:52:42 +02:00 |
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verilog
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write_verilog: don't assign to a reg.
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2024-04-03 13:06:45 +02:00 |
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vloghtb
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xprop
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tests: Comment on A[0]
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2024-02-16 11:43:28 +01:00 |
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gen-tests-makefile.sh
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do not override existing shell variable
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2024-02-12 12:58:13 +01:00 |
