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yosys/techlibs/xilinx
2023-08-12 11:59:39 +10:00
..
tests
abc9_model.v
arith_map.v
brams_defs.vh xilinx: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
brams_xc2v.txt xilinx: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
brams_xc2v_map.v
brams_xc3sda.txt xilinx: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
brams_xc3sda_map.v
brams_xc4v.txt xilinx: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
brams_xc4v_map.v
brams_xc5v_map.v
brams_xc6v_map.v
brams_xcu_map.v
brams_xcv.txt
brams_xcv_map.v
cells_map.v iopadmap: Add native support for negative-polarity output enable. 2021-11-09 15:40:16 +01:00
cells_sim.v Update Xilinx cell definitions, fixes #3699 2023-03-23 09:44:36 +01:00
cells_xtra.py
cells_xtra.v
ff_map.v
lut_map.v Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
lutrams_xc5v.txt xilinx: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
lutrams_xc5v_map.v
lutrams_xcu.txt
lutrams_xcv.txt
lutrams_xcv_map.v xilinx: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
Makefile.inc
mux_map.v
synth_xilinx.cc
urams.txt
urams_map.v
xc3s_mult_map.v
xc3sda_dsp_map.v
xc4v_dsp_map.v xilinx: Support multiplier mapping for all families. 2019-10-22 18:06:57 +02:00
xc5v_dsp_map.v
xc6s_dsp_map.v
xc7_dsp_map.v xilinx: do not make DSP48E1 a whitebox for ABC9 by default (#2325) 2020-09-23 09:15:24 -07:00
xcu_dsp_map.v
xilinx_dffopt.cc Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00