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yosys/tests/arch
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Marcin Kościelnicki 89adef352f xilinx: Add support for LUT RAM on LUT4-based devices. 
There are multiple other kinds of RAMs supported on these devices, but
RAM16X1D is the only dual-port one.

Fixes #1549
2020-02-07 09:03:22 +01:00
..
anlogic Call equiv_opt with -multiclock and -assert 2019-12-31 18:39:32 -08:00
common Merge pull request #1574 from YosysHQ/eddie/xilinx_lutram 2019-12-16 21:48:21 -08:00
ecp5 Merge remote-tracking branch 'origin/master' into eddie/shiftx2mux 2020-02-05 10:47:31 -08:00
efinix Merge remote-tracking branch 'origin/master' into eddie/shiftx2mux 2020-02-05 10:47:31 -08:00
gowin Add opt_lut_ins pass. (#1673) 2020-02-03 14:57:17 +01:00
ice40 Import tests from #1628 2020-01-27 13:56:16 -08:00
xilinx xilinx: Add support for LUT RAM on LUT4-based devices. 2020-02-07 09:03:22 +01:00
run-test.sh Add simcells.v, simlib.v, and some output 2019-06-27 11:13:49 -07:00