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f652a9c11c
yosys
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tests
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arch
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Eddie Hung
7cd3f4a79b
abc9_ops: add -prep_bypass for auto bypass boxes; refactor
...
Eliminate need for abc9_{,un}map.v in xilinx -prep_dff_{hier,unmap} -> -prep_hier
2020-05-14 10:33:56 -07:00
..
anlogic
common
ecp5
efinix
gowin
ice40
test: ice40_dsp test to read +/ice40/cells_sim.v for default params
2020-04-22 16:35:35 -07:00
intel_alm
intel_alm: direct LUTRAM cell instantiation
2020-05-07 21:03:13 +02:00
xilinx
abc9_ops: add -prep_bypass for auto bypass boxes; refactor
2020-05-14 10:33:56 -07:00
run-test.sh