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aiger
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arch
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Fix the tests we just broke
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2021-12-10 00:22:37 +01:00 |
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asicworld
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bind
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Add support for parsing the SystemVerilog 'bind' construct
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2021-07-16 09:31:39 -04:00 |
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blif
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tests/blif: Add missing gitignore
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2021-05-20 12:49:51 +02:00 |
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bram
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Fix the tests we just broke
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2021-12-10 00:22:37 +01:00 |
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errors
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fsm
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hana
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liberty
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lut
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memfile
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memories
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Fix the tests we just broke
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2021-12-10 00:22:37 +01:00 |
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opt
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extract_reduce: Refactor and fix input signal construction.
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2021-10-21 04:10:01 +02:00 |
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opt_share
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proc
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proc_prune: Make assign removal and promotion per-bit, remember promoted bits.
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2021-08-14 15:26:11 +02:00 |
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realmath
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rpc
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sat
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assertpmux: Fix crash on unused $pmux output.
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2021-02-22 23:30:28 +01:00 |
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select
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share
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simple
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fix width detection of array querying function in case and case item expressions
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2021-12-17 21:22:08 -07:00 |
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simple_abc9
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abc9: fix SCC issues (#2694)
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2021-03-29 22:01:57 -07:00 |
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smv
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sva
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svinterfaces
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Add a test for interfaces on modules loaded on-demand
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2021-07-14 22:54:50 -04:00 |
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svtypes
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sv: improve support for wire and var with user-defined types
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2021-08-12 22:41:41 -06:00 |
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techmap
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Fix the tests we just broke
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2021-12-10 00:22:37 +01:00 |
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tools
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Fixes in vcdcd.pl for newer Perl versions
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2021-10-19 10:56:43 +02:00 |
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unit
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various
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Fix the tests we just broke
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2021-12-10 00:22:37 +01:00 |
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verilog
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preprocessor: do not destroy double slash escaped identifiers
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2021-12-15 18:06:02 -07:00 |
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vloghtb
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Use HTTPS for website links, gatecat email
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2021-06-09 12:16:56 +02:00 |
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gen-tests-makefile.sh
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7608985d2c