Marcin Kościelnicki 9b982e929c xilinx: Mark IOBUFDS.IOB as external pad		2020-03-20 14:37:38 +01:00
..
tests
.gitignore
abc9_map.v	xilinx: consider DSP48E1.ADREG	2020-03-04 12:04:02 -08:00
abc9_model.v	xilinx: consider DSP48E1.ADREG	2020-03-04 12:04:02 -08:00
abc9_unmap.v	xilinx: consider DSP48E1.ADREG	2020-03-04 12:04:02 -08:00
arith_map.v
brams_init.py	synth_xilinx: Initial Spartan 6 block RAM inference support.	2019-07-11 14:45:48 +02:00
cells_map.v
cells_sim.v	xilinx: consider DSP48E1.ADREG	2020-03-04 12:04:02 -08:00
cells_xtra.py	xilinx: Mark IOBUFDS.IOB as external pad	2020-03-20 14:37:38 +01:00
cells_xtra.v	xilinx: Mark IOBUFDS.IOB as external pad	2020-03-20 14:37:38 +01:00
lut4_lutrams.txt	xilinx: Add support for LUT RAM on LUT4-based devices.	2020-02-07 09:03:22 +01:00
lut6_lutrams.txt	xilinx: Add support for LUT RAM on LUT4-based devices.	2020-02-07 09:03:22 +01:00
lut_map.v
lutrams_map.v
Makefile.inc	Auto-generate .box/.lut files from specify blocks	2020-02-27 10:17:29 -08:00
mux_map.v
synth_xilinx.cc	Update xilinx for ABC9	2020-02-27 10:17:29 -08:00
xc2v_brams.txt
xc2v_brams_map.v
xc3s_mult_map.v
xc3sa_brams.txt
xc3sda_brams.txt
xc3sda_dsp_map.v
xc4v_dsp_map.v
xc5v_dsp_map.v
xc6s_brams.txt
xc6s_brams_map.v
xc6s_dsp_map.v
xc6s_ff_map.v
xc7_brams_map.v
xc7_dsp_map.v
xc7_ff_map.v
xc7_xcu_brams.txt
xcu_brams_map.v
xcu_dsp_map.v
xcup_urams.txt
xcup_urams_map.v
xilinx_dffopt.cc