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yosys/techlibs/ice40
Clifford Wolf 9284cf92b8 Remove ice40/cells_sim.v hack to avoid warning for blocking memory writes
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-03-12 20:14:18 +01:00
..
tests
.gitignore
arith_map.v
brams.txt
brams_init.py
brams_map.v
cells_map.v
cells_sim.v
ice40_braminit.cc
ice40_ffinit.cc
ice40_ffssr.cc
ice40_opt.cc
ice40_unlut.cc
latches_map.v
Makefile.inc
synth_ice40.cc