yosys

mirror of https://github.com/YosysHQ/yosys synced 2026-08-02 20:33:26 +00:00

Robert O'Callahan 8b75c06141 Add a general tests/.gitignore and remove redundant entries in subdirectory .gitignore files.		2025-07-22 10:38:38 +00:00
..
hana_vlib.v
README
run-test.sh
test_intermout.v
test_parse2synthtrans.v
test_parser.v
test_simulation_always.v
test_simulation_and.v
test_simulation_buffer.v
test_simulation_decoder.v
test_simulation_inc.v
test_simulation_mux.v
test_simulation_nand.v
test_simulation_nor.v
test_simulation_or.v
test_simulation_seq.v
test_simulation_shifter.v
test_simulation_sop.v
test_simulation_techmap.v
test_simulation_techmap_tech.v
test_simulation_vlib.v
test_simulation_xnor.v
test_simulation_xor.v

These test cases are copied from the hana project:
https://sourceforge.net/projects/sim-sim/