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yosys/techlibs
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David Shah 5545cd3c10
Merge pull request #1260 from YosysHQ/dave/ecp5_cell_fixes 
ecp5: Make cells_sim.v consistent with nextpnr
2019-08-07 15:35:29 +01:00
..
achronix Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
anlogic anlogic : Fix alu mapping 2019-08-03 14:47:33 +02:00
common Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs 2019-08-06 04:47:55 +02:00
coolrunner2 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
easic Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
ecp5 ecp5: Make cells_sim.v consistent with nextpnr 2019-08-07 14:19:31 +01:00
gowin Fix formatting for msys2 mingw build using GetSize 2019-08-01 17:27:34 +02:00
greenpak4 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
ice40 ice40: Fix test_dsp_model.sh 2019-07-19 17:33:57 +01:00
intel Merge branch 'ZirconiumX-synth_intel_m9k' 2019-07-25 17:23:48 +02:00
sf2 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
xilinx RST -> RSTBRST for RAMB8BWER 2019-07-29 16:05:44 -07:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00