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yosys/frontends/verilog
David Shah 92694ea3a9 verilog_lexer: Increase YY_BUF_SIZE to 65536
Signed-off-by: David Shah <dave@ds0.me>
2019-07-26 13:35:39 +01:00
..
.gitignore
const2ast.cc
Makefile.inc
preproc.cc Support SystemVerilog `` extension for macros 2018-05-17 00:09:56 -04:00
verilog_frontend.cc
verilog_frontend.h
verilog_lexer.l verilog_lexer: Increase YY_BUF_SIZE to 65536 2019-07-26 13:35:39 +01:00
verilog_parser.y Some cleanups in "ignore specify parser" 2019-07-03 11:22:10 +02:00