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	Mostly memory_libmap arg checks; puts the checks into an else block on the `if (help_mode)` check to avoid cases like `synth_ice40` listing `-no-auto-huge [-no-auto-huge]`. Also fix `map_iopad` section being empty in `synth_fabulous`.
		
			
				
	
	
		
			407 lines
		
	
	
	
		
			12 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			407 lines
		
	
	
	
		
			12 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
/*
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 *  yosys -- Yosys Open SYnthesis Suite
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 *
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 *  Copyright (C) 2012  Claire Xenia Wolf <claire@yosyshq.com>
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 *
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 *  Permission to use, copy, modify, and/or distribute this software for any
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 *  purpose with or without fee is hereby granted, provided that the above
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 *  copyright notice and this permission notice appear in all copies.
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 *
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 *  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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 *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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 *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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 *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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 *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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 *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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 *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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 *
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 */
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#include "kernel/register.h"
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#include "kernel/celltypes.h"
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#include "kernel/rtlil.h"
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#include "kernel/log.h"
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USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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struct SynthPass : public ScriptPass
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{
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	SynthPass() : ScriptPass("synth_fabulous", "FABulous synthesis script") { }
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	void help() override
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	{
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		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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		log("\n");
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		log("    synth_fabulous [options]\n");
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		log("\n");
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		log("This command runs synthesis for FPGA fabrics generated with FABulous. This command does not operate\n");
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		log("on partly selected designs.\n");
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		log("\n");
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		log("    -top <module>\n");
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		log("        use the specified module as top module (default='top')\n");
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		log("\n");
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		log("    -auto-top\n");
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		log("        automatically determine the top of the design hierarchy\n");
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		log("\n");
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		log("    -blif <file>\n");
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		log("        write the design to the specified BLIF file. writing of an output file\n");
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		log("        is omitted if this parameter is not specified.\n");
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		log("\n");
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		log("    -edif <file>\n");
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		log("        write the design to the specified EDIF file. writing of an output file\n");
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		log("        is omitted if this parameter is not specified.\n");
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		log("\n");
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		log("    -json <file>\n");
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		log("        write the design to the specified JSON file. writing of an output file\n");
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		log("        is omitted if this parameter is not specified.\n");
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		log("\n");
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		log("    -lut <k>\n");
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		log("        perform synthesis for a k-LUT architecture (default 4).\n");
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		log("\n");
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		log("    -vpr\n");
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		log("        perform synthesis for the FABulous VPR flow (using slightly different techmapping).\n");
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		log("\n");
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		log("    -plib <primitive_library.v>\n");
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		log("        use the specified Verilog file as a primitive library.\n");
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		log("\n");
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		log("    -extra-plib <primitive_library.v>\n");
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		log("        use the specified Verilog file for extra primitives (can be specified multiple\n");
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		log("        times).\n");
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		log("\n");
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		log("    -extra-map <techamp.v>\n");
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		log("        use the specified Verilog file for extra techmap rules (can be specified multiple\n");
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		log("        times).\n");
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		log("\n");
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		log("    -encfile <file>\n");
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		log("        passed to 'fsm_recode' via 'fsm'\n");
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		log("\n");
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		log("    -nofsm\n");
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		log("        do not run FSM optimization\n");
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		log("\n");
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		log("    -noalumacc\n");
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		log("        do not run 'alumacc' pass. i.e. keep arithmetic operators in\n");
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		log("        their direct form ($add, $sub, etc.).\n");
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		log("\n");
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		log("    -carry <none|ha>\n");
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		log("        carry mapping style (none, half-adders, ...) default=none\n");
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		log("\n");
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		log("    -noregfile\n");
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		log("        do not map register files\n");
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		log("\n");
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		log("    -iopad\n");
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		log("        enable automatic insertion of IO buffers (otherwise a wrapper\n");
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		log("        with manually inserted and constrained IO should be used.)\n");
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		log("\n");
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		log("    -complex-dff\n");
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		log("        enable support for FFs with enable and synchronous SR (must also be\n");
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		log("        supported by the target fabric.)\n");
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		log("\n");
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		log("    -noflatten\n");
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		log("        do not flatten design after elaboration\n");
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		log("\n");
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		log("    -nordff\n");
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		log("        passed to 'memory'. prohibits merging of FFs into memory read ports\n");
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		log("\n");
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		log("    -noshare\n");
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		log("        do not run SAT-based resource sharing\n");
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		log("\n");
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		log("    -run <from_label>[:<to_label>]\n");
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		log("        only run the commands between the labels (see below). an empty\n");
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		log("        from label is synonymous to 'begin', and empty to label is\n");
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		log("        synonymous to the end of the command list.\n");
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		log("\n");
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		log("    -no-rw-check\n");
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		log("        marks all recognized read ports as \"return don't-care value on\n");
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		log("        read/write collision\" (same result as setting the no_rw_check\n");
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		log("        attribute on all memories).\n");
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		log("\n");
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		log("\n");
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		log("The following commands are executed by this synthesis command:\n");
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		help_script();
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		log("\n");
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	}
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	string top_module, json_file, blif_file, plib, fsm_opts, memory_opts, carry_mode;
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	std::vector<string> extra_plib, extra_map;
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	bool autotop, forvpr, noalumacc, nofsm, noshare, noregfile, iopad, complexdff, flatten;
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	int lut;
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	void clear_flags() override
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	{
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		top_module.clear();
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		plib.clear();
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		autotop = false;
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		lut = 4;
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		forvpr = false;
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		noalumacc = false;
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		nofsm = false;
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		noshare = false;
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		iopad = false;
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		complexdff = false;
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		carry_mode = "none";
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		flatten = true;
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		json_file = "";
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		blif_file = "";
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	}
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	void execute(std::vector<std::string> args, RTLIL::Design *design) override
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	{
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		string run_from, run_to;
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		clear_flags();
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		size_t argidx;
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		for (argidx = 1; argidx < args.size(); argidx++)
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		{
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			if (args[argidx] == "-top" && argidx+1 < args.size()) {
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				top_module = args[++argidx];
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				continue;
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			}
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			if (args[argidx] == "-json" && argidx+1 < args.size()) {
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				json_file = args[++argidx];
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				continue;
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			}
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			if (args[argidx] == "-blif" && argidx+1 < args.size()) {
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				blif_file = args[++argidx];
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				continue;
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			}
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			if (args[argidx] == "-run" && argidx+1 < args.size()) {
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				size_t pos = args[argidx+1].find(':');
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				if (pos == std::string::npos) {
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					run_from = args[++argidx];
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					run_to = args[argidx];
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				} else {
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					run_from = args[++argidx].substr(0, pos);
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					run_to = args[argidx].substr(pos+1);
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				}
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				continue;
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			}
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			if (args[argidx] == "-vpr") {
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				forvpr = true;
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				continue;
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			}
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			if (args[argidx] == "-auto-top") {
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				autotop = true;
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				continue;
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			}
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			if (args[argidx] == "-lut") {
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				lut = atoi(args[++argidx].c_str());
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				continue;
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			}
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			if (args[argidx] == "-plib" && argidx+1 < args.size()) {
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				plib = args[++argidx];
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				continue;
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			}
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			if (args[argidx] == "-extra-plib" && argidx+1 < args.size()) {
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				extra_plib.push_back(args[++argidx]);
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				continue;
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			}
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			if (args[argidx] == "-extra-map" && argidx+1 < args.size()) {
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				extra_map.push_back(args[++argidx]);
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				continue;
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			}
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			if (args[argidx] == "-nofsm") {
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				nofsm = true;
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				continue;
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			}
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			if (args[argidx] == "-noalumacc") {
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				noalumacc = true;
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				continue;
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			}
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			if (args[argidx] == "-nordff") {
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				memory_opts += " -nordff";
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				continue;
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			}
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			if (args[argidx] == "-noshare") {
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				noshare = true;
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				continue;
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			}
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			if (args[argidx] == "-no-rw-check") {
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				memory_opts += " -no-rw-check";
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				continue;
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			}
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			if (args[argidx] == "-noregfile") {
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				noregfile = true;
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				continue;
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			}
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			if (args[argidx] == "-iopad") {
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				iopad = true;
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				continue;
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			}
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			if (args[argidx] == "-complex-dff") {
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				complexdff = true;
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				continue;
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			}
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			if (args[argidx] == "-carry") {
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				carry_mode = args[++argidx];
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				if (carry_mode != "none" && carry_mode != "ha")
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					log_cmd_error("Unsupported carry style: %s\n", carry_mode.c_str());
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				continue;
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			}
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			if (args[argidx] == "-noflatten") {
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				flatten = false;
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				continue;
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			}
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			break;
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		}
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		extra_args(args, argidx, design);
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		if (!design->full_selection())
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			log_cmd_error("This command only operates on fully selected designs!\n");
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		log_header(design, "Executing SYNTH_FABULOUS pass.\n");
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		log_push();
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		run_script(design, run_from, run_to);
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		log_pop();
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	}
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	void script() override
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	{
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		if (plib.empty())
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			run(stringf("read_verilog %s -lib +/fabulous/prims.v", complexdff ? "-DCOMPLEX_DFF" : ""));
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		else
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			run("read_verilog -lib " + plib);
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		if (help_mode) {
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			run("read_verilog -lib <extra_plib.v>", "(for each -extra-plib)");
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		} else for (auto lib : extra_plib) {
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			run("read_verilog -lib " + lib);
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		}
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		if (check_label("begin")) {
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			if (top_module.empty()) {
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				if (autotop)
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					run("hierarchy -check -auto-top");
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				else
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					run("hierarchy -check");
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			} else
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				run(stringf("hierarchy -check -top %s", top_module.c_str()));
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			run("proc");
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		}
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		if (check_label("flatten", "(unless -noflatten)"))
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		{
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			if (flatten) {
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				run("flatten");
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				run("tribuf -logic");
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				run("deminout");
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			}
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		}
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		if (check_label("coarse")) {
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	 		run("tribuf -logic");
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			run("deminout");
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			// synth pass
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			run("opt_expr");
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			run("opt_clean");
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			run("check");
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			run("opt -nodffe -nosdff");
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			if (!nofsm)
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				run("fsm" + fsm_opts, "      (unless -nofsm)");
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			run("opt");
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			run("wreduce");
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			run("peepopt");
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			run("opt_clean");
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			if (help_mode)
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				run("techmap -map +/cmp2lut.v -map +/cmp2lcu.v", " (if -lut)");
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			else if (lut)
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				run(stringf("techmap -map +/cmp2lut.v -map +/cmp2lcu.v -D LUT_WIDTH=%d", lut));
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			if (!noalumacc)
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				run("alumacc", "  (unless -noalumacc)");
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			if (!noshare)
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				run("share", "    (unless -noshare)");
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			run("opt");
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			run("memory -nomap" + memory_opts);
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			run("opt_clean");
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		}
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		if (check_label("map_ram", "(unless -noregfile)")) {
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			// RegFile extraction
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			if (!noregfile) {
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				run("memory_libmap -lib +/fabulous/ram_regfile.txt");
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				run("techmap -map +/fabulous/regfile_map.v");
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			}
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		}
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		if (check_label("map_ffram")) {
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			run("opt -fast -mux_undef -undriven -fine");
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			run("memory_map");
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			run("opt -undriven -fine");
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		}
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		if (check_label("map_gates")) {
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			run("opt -full");
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			run(stringf("techmap -map +/techmap.v -map +/fabulous/arith_map.v -D ARITH_%s",
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				help_mode ? "<carry>" : carry_mode.c_str()));
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			run("opt -fast");
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		}
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		if (check_label("map_iopad", "(if -iopad)")) {
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			if (iopad || help_mode) {
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				run("opt -full");
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				run("iopadmap -bits -outpad $__FABULOUS_OBUF I:PAD -inpad $__FABULOUS_IBUF O:PAD "
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					"-toutpad IO_1_bidirectional_frame_config_pass ~T:I:PAD "
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					"-tinoutpad IO_1_bidirectional_frame_config_pass ~T:O:I:PAD A:top", "(skip if '-noiopad')");
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				run("techmap -map +/fabulous/io_map.v");
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			}
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		}
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		if (check_label("map_ffs")) {
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			if (complexdff) {
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				run("dfflegalize -cell $_DFF_P_ 0 -cell $_SDFF_PP?_ 0 -cell $_SDFFCE_PP?P_ 0 -cell $_DLATCH_?_ x", "with -complex-dff");
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			} else {
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				run("dfflegalize -cell $_DFF_P_ 0 -cell $_DLATCH_?_ x", "without -complex-dff");
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			}
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			run("techmap -map +/fabulous/latches_map.v");
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			run("techmap -map +/fabulous/ff_map.v");
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			if (help_mode) {
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				run("techmap -map <extra_map.v>...", "(for each -extra-map)");
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			} else if (!extra_map.empty()) {
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				std::string map_str = "techmap";
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				for (auto map : extra_map)
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					map_str += stringf(" -map %s", map.c_str());
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				run(map_str);
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			}
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			run("clean");
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		}
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		if (check_label("map_luts")) {
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			run(stringf("abc -lut %d -dress", lut));
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			run("clean");
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		}
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		if (check_label("map_cells")) {
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			if (!forvpr)
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				run(stringf("techmap -D LUT_K=%d -map +/fabulous/cells_map.v", lut));
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			run("clean");
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		}
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		if (check_label("check")) {
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			run("hierarchy -check");
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			run("stat");
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		}
 | 
						|
 | 
						|
		if (check_label("blif"))
 | 
						|
		{
 | 
						|
			if (!blif_file.empty() || help_mode)
 | 
						|
			{
 | 
						|
				run("opt_clean -purge");
 | 
						|
				run(stringf("write_blif -attr -cname -conn -param %s",
 | 
						|
						help_mode ? "<file-name>" : blif_file.c_str()));
 | 
						|
			}
 | 
						|
		}
 | 
						|
 | 
						|
		if (check_label("json"))
 | 
						|
		{
 | 
						|
			if (!json_file.empty() || help_mode)
 | 
						|
				run(stringf("write_json %s", help_mode ? "<file-name>" : json_file.c_str()));
 | 
						|
		}
 | 
						|
	}
 | 
						|
} SynthPass;
 | 
						|
 | 
						|
PRIVATE_NAMESPACE_END
 |