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yosys/kernel
whitequark e97e33d00d kernel: require \B_SIGNED=0 on $shl, $sshl, $shr, $sshr.
Before this commit, these cells would accept any \B_SIGNED and in
case of \B_SIGNED=1, would still treat the \B input as unsigned.

Also fix the Verilog frontend to never emit such constructs.
2019-12-04 11:59:36 +00:00
..
bitpattern.h
calc.cc
cellaigs.cc
cellaigs.h
celledges.cc
celledges.h
celltypes.h
consteval.h
cost.h
driver.cc
hashlib.h
log.cc
log.h
macc.h
modtools.h
register.cc
register.h
rtlil.cc kernel: require \B_SIGNED=0 on $shl, $sshl, $shr, $sshr. 2019-12-04 11:59:36 +00:00
rtlil.h
satgen.h
sigtools.h
utils.h
yosys.cc
yosys.h