mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-06 01:24:10 +00:00
f0a52e3dd2
In line with other tools, this adds an extra wrapping block around such for loops to appropriately scope the variable.
10 lines
220 B
Plaintext
10 lines
220 B
Plaintext
logger -expect error "For loop variable declaration is missing initialization!" 1
|
|
read_verilog -sv <<EOT
|
|
module top;
|
|
integer z;
|
|
initial
|
|
for (integer i; i < 10; i = i + 1)
|
|
z = i;
|
|
endmodule
|
|
EOT
|