mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-05 09:04:08 +00:00
7 lines
181 B
Plaintext
7 lines
181 B
Plaintext
logger -warn "Successfully finished Verilog frontend." -expect warning "Successfully finished Verilog frontend." 1
|
|
read_verilog << EOF
|
|
module top(...);
|
|
assign b = w;
|
|
endmodule
|
|
EOF
|