| .gitignore | Add .gitignore | 2019-09-18 12:11:33 -07:00 | 
		
			
			
			
			
				| dsp_simd.ys | Add SIMD test | 2019-09-09 21:40:06 -07:00 | 
		
			
			
			
			
				| latches.v | Add latch test modified from #1363 | 2019-09-30 12:52:43 +02:00 | 
		
			
			
			
			
				| latches.ys | Use equiv_opt -async2sync for xilinx | 2019-10-03 10:30:33 -07:00 | 
		
			
			
			
			
				| macc.sh | Add mac.sh and macc_tb.v for testing | 2019-09-19 18:08:16 -07:00 | 
		
			
			
			
			
				| macc.v | Refine macc testcase | 2019-09-18 12:07:25 -07:00 | 
		
			
			
			
			
				| macc.ys | Refine macc testcase | 2019-09-18 12:07:25 -07:00 | 
		
			
			
			
			
				| macc_tb.v | Add mac.sh and macc_tb.v for testing | 2019-09-19 18:08:16 -07:00 | 
		
			
			
			
			
				| mul_unsigned.v | Add mul_unsigned test | 2019-08-30 14:35:05 -07:00 | 
		
			
			
			
			
				| mul_unsigned.ys | Remove stat | 2019-09-18 12:44:34 -07:00 | 
		
			
			
			
			
				| pmgen_xilinx_srl.ys | Use test_pmgen for xilinx_srl | 2019-08-28 09:55:09 -07:00 | 
		
			
			
			
			
				| run-test.sh | Add xilinx_srl test | 2019-08-28 09:24:19 -07:00 | 
		
			
			
			
			
				| xilinx_srl.v | Add xilinx_srl test | 2019-08-28 09:24:19 -07:00 | 
		
			
			
			
			
				| xilinx_srl.ys | Do not simplemap for variable test | 2019-08-28 09:26:08 -07:00 |