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anlogic
|
make note that it is for latch mode
|
2019-09-18 17:48:16 +02:00 |
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common
|
Be sensitive to signedness
|
2019-09-10 15:14:55 -07:00 |
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efinix
|
better handling of lut and begin/end add
|
2019-09-18 17:45:07 +02:00 |
|
ice40
|
Move mul2dsp before wreduce
|
2019-09-20 08:41:40 -07:00 |
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xilinx
|
Tidy up, fix undriven
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2019-09-19 20:04:52 -07:00 |