Miodrag Milanovic a689342207 Remove trailing whitespaces		2026-06-23 07:24:59 +02:00
..
.gitignore
abc9_dff.ys
add_sub.ys
adffs.ys
asym_ram_sdp.ys	End of file fix	2026-06-23 07:23:41 +02:00
asym_ram_sdp_read_wider.v	Remove trailing whitespaces	2026-06-23 07:24:59 +02:00
asym_ram_sdp_write_wider.v	End of file fix	2026-06-23 07:23:41 +02:00
attributes_test.ys	Remove trailing whitespaces	2026-06-23 07:24:59 +02:00
blockram.ys	Remove trailing whitespaces	2026-06-23 07:24:59 +02:00
bug1460.ys
bug1462.ys
bug1480.ys
bug1598.ys	Remove trailing whitespaces	2026-06-23 07:24:59 +02:00
bug1605.ys
bug3670.v
bug3670.ys
counter.ys
dffs.ys	End of file fix	2026-06-23 07:23:41 +02:00
dsp_abc9.ys
dsp_cascade.ys	End of file fix	2026-06-23 07:23:41 +02:00
dsp_fastfir.ys
dsp_preadder_sub.ys
dsp_simd.ys
dynamic_upto_select.ys	Replace suitable (2^k-1)-x with ~x.	2026-06-10 11:29:55 +02:00
fsm.ys
generate_mk.py
latches.ys
logic.ys
lutram.ys
macc.sh	Make out of tree build testing possible	2026-05-19 14:26:07 +02:00
macc.v
macc.ys
macc_tb.v
mul.ys
mul_unsigned.v
mul_unsigned.ys
mux.ys
mux_lut4.ys
nosrl.ys
opt_lut_ins.ys
pmgen_xilinx_srl.ys
priority_memory.v
priority_memory.ys
shifter.ys
tribuf.sh	Make out of tree build testing possible	2026-05-19 14:26:07 +02:00
tribuf.ys
xilinx_dffopt.ys
xilinx_dffopt_blacklist.txt
xilinx_dsp.ys
xilinx_srl.v	Remove trailing whitespaces	2026-06-23 07:24:59 +02:00
xilinx_srl.ys