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yosys/techlibs
2021-02-23 17:39:58 +01:00
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achronix
anlogic
common verilog: significant block scoping improvements 2021-01-31 09:42:09 -05:00
coolrunner2
easic
ecp5
efinix
gowin add -noalu and -json option for apicula 2020-11-30 11:43:12 +01:00
greenpak4
ice40 verilog: significant block scoping improvements 2021-01-31 09:42:09 -05:00
intel
intel_alm
machxo2 machxo2: Add DCCA and DCMA blackbox primitives. 2021-02-23 17:39:58 +01:00
nexus nexus: Add MULTADDSUB9X9WIDE sim model 2020-12-08 15:49:20 +00:00
sf2
xilinx verilog: significant block scoping improvements 2021-01-31 09:42:09 -05:00
.gitignore