Akash Levy 881080a827 Merge upstream		2025-03-05 07:54:26 -08:00
..
.gitignore	quicklogic: Initial blockram tests	2023-12-04 15:52:03 +01:00
add_sub.ys	quicklogic: Add basic k6n10f tests	2023-12-04 15:52:03 +01:00
adffs.ys	quicklogic: Add basic k6n10f tests	2023-12-04 15:52:03 +01:00
counter.ys	Merge upstream	2025-03-05 07:54:26 -08:00
dffs.ys	Merge upstream	2025-03-05 07:54:26 -08:00
div.ys	quicklogic: Relax the LUT number test	2024-10-07 15:27:03 +02:00
dsp.ys	tests: Run async2sync before sat and/or sim to handle $check cells	2024-02-01 16:14:11 +01:00
fsm.ys	quicklogic: Add basic k6n10f tests	2023-12-04 15:52:03 +01:00
ioff.ys	Merge upstream	2025-03-05 07:54:26 -08:00
latches.ys	quicklogic: Add basic k6n10f tests	2023-12-04 15:52:03 +01:00
logic.ys	quicklogic: Add basic k6n10f tests	2023-12-04 15:52:03 +01:00
mem_gen.py	tests: Run async2sync before sat and/or sim to handle $check cells	2024-02-01 16:14:11 +01:00
mem_tb.v	qlf_tests: minor adjustment	2023-12-04 15:52:03 +01:00
meminit.v	quicklogic: Test TDP36K inference with initial data	2023-12-04 15:52:03 +01:00
meminit.ys	tests: Run async2sync before sat and/or sim to handle $check cells	2024-02-01 16:14:11 +01:00
mux.ys	quicklogic: Add basic k6n10f tests	2023-12-04 15:52:03 +01:00
run-test.sh	test: restore verific handling, nicer naming	2024-12-13 10:24:47 +01:00