Eddie Hung 2f98f9deee Add mac.sh and macc_tb.v for testing		2019-09-19 18:08:16 -07:00
..
aiger
arch
asicworld	Fix FIRRTL to Verilog process instance subfield assignment.	2019-02-25 16:18:13 -08:00
bram
errors
fsm	Speed up "make test" and related cleanups	2019-08-17 14:37:07 +02:00
hana
ice40	Format macc.v	2019-09-19 11:02:14 -07:00
liberty	Liberty file parser now accepts superfluous ;	2019-03-27 15:16:19 +01:00
lut
memories
opt	Add missing -assert to equiv_opt	2019-09-06 22:51:44 -07:00
opt_share
proc	proc_clean: fix order of switch insertion.	2019-08-19 16:44:23 +00:00
realmath
sat	Revert to using clean	2019-08-27 09:24:32 -07:00
share
simple	simple/peepopt.v tests to various/peepopt.ys with equiv_opt & select	2019-09-05 08:43:22 -07:00
simple_abc9	Revert "abc9 followed by clean otherwise netlist could be invalid for sim"	2019-09-05 08:25:09 -07:00
smv
sva
svinterfaces
techmap	Added extractinv pass	2019-09-19 04:02:48 +02:00
tools
unit
various	Merge pull request #1355 from YosysHQ/eddie/peepopt_dffmuxext	2019-09-18 12:40:08 -07:00
vloghtb	bugfix in blif front-end	2015-05-18 11:15:49 +02:00
xilinx	Add mac.sh and macc_tb.v for testing	2019-09-19 18:08:16 -07:00