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yosys/techlibs/machxo2
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gatecat cae905f551 Blackbox all whiteboxes after synthesis 
This prevents issues like processes in whiteboxes triggering an error in
the JSON backend.

Signed-off-by: gatecat <gatecat@ds0.me>
2021-03-17 21:07:20 +00:00
..
cells_map.v machxo2: Tristate is active-low. 2021-02-23 17:39:58 +01:00
cells_sim.v machxo2: Switch to LUT4 sim model which propagates less undefined/don't care values. 2021-02-23 17:39:58 +01:00
Makefile.inc machxo2: Create basic techlibs and synth_machxo2 pass. 2021-02-23 17:39:58 +01:00
synth_machxo2.cc Blackbox all whiteboxes after synthesis 2021-03-17 21:07:20 +00:00