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	* When used with -tempinduct mode, -seq <N> causes assertions to be ignored in the first N steps. While this has uses for reset modelling, for these test cases it is unnecessary and could lead to failures slipping through uncaught
		
			
				
	
	
		
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			310 B
		
	
	
	
		
			Text
		
	
	
	
	
	
			
		
		
	
	
			21 lines
		
	
	
	
		
			310 B
		
	
	
	
		
			Text
		
	
	
	
	
	
read_verilog -sv <<EOF
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parameter Q = 1;
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EOF
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read_verilog -sv <<EOF
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parameter P = Q;
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module top(
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    output integer out
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);
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    assign out = P;
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    always @*
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        assert (out == 1);
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endmodule
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EOF
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hierarchy
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proc
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flatten
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opt -full
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async2sync
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select -module top
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sat -verify -tempinduct -prove-asserts -show-all
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