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51d9b73107
We need to invoke "read_verilog" manually, since the default action on input files is to defer processing. Under such conditions, we never simplify the AST, and initial $prints never execute. |
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| .. | ||
| aiger | ||
| arch | ||
| asicworld | ||
| bind | ||
| blif | ||
| bram | ||
| errors | ||
| fmt | ||
| fsm | ||
| hana | ||
| liberty | ||
| lut | ||
| memfile | ||
| memlib | ||
| memories | ||
| opt | ||
| opt_share | ||
| proc | ||
| realmath | ||
| rpc | ||
| sat | ||
| select | ||
| share | ||
| sim | ||
| simple | ||
| simple_abc9 | ||
| smv | ||
| sva | ||
| svinterfaces | ||
| svtypes | ||
| techmap | ||
| tools | ||
| unit | ||
| various | ||
| verific | ||
| verilog | ||
| vloghtb | ||
| xprop | ||
| gen-tests-makefile.sh | ||