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Code Activity
yosys/examples/intel/MAX10
History
Dan Ravensloft d5b3b3bc6f synth_intel: revert change to run_max10
2019-07-18 17:09:15 +01:00
..
run_max10 synth_intel: revert change to run_max10 2019-07-18 17:09:15 +01:00
runme_postsynth Add initial support for both MAX10 and Cyclone IV (E|GX) FPGAs 2017-04-05 23:01:29 -05:00
sevenseg.v Squelch trailing whitespace 2017-04-12 15:11:09 +02:00
top.v Squelch trailing whitespace 2017-04-12 15:11:09 +02:00