3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-05-11 09:44:44 +00:00
yosys/tests/verilog/unbased_unsized_shift.ys
George Rennie dfa8453102 tests: remove -seq 1 from sat with -tempinduct where possible
* When used with -tempinduct mode, -seq <N> causes assertions to be
  ignored in the first N steps. While this has uses for reset modelling,
  for these test cases it is unnecessary and could lead to failures
  slipping through uncaught
2024-10-03 16:39:17 +02:00

8 lines
154 B
Text

read_verilog -sv unbased_unsized_shift.sv
hierarchy
proc
flatten
opt -full
async2sync
select -module top
sat -verify -tempinduct -prove-asserts -show-all