mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-26 02:25:35 +00:00
Code Activity
yosys/techlibs/quicklogic/common
History
N. Engelhardt 98769010af synth_quicklogic: rearrange files to prepare for adding more architectures
2023-12-04 15:52:02 +01:00
..
cells_sim.v synth_quicklogic: rearrange files to prepare for adding more architectures 2023-12-04 15:52:02 +01:00