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4af5baab21
All DFFs map to either FDCP (matches Xilinx) or a custom FDCP_N (negative-edge triggered)
32 lines
839 B
Plaintext
32 lines
839 B
Plaintext
library(xc2_dff) {
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cell(FDCP) {
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area: 1;
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ff("IQ", "IQN") { clocked_on: C;
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next_state: D;
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clear: "CLR";
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preset: "PRE"; }
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pin(C) { direction: input;
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clock: true; }
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pin(D) { direction: input; }
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pin(Q) { direction: output;
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function: "IQ"; }
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pin(CLR) { direction: input; }
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pin(PRE) { direction: input; }
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}
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cell(FDCP_N) {
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area: 1;
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ff("IQ", "IQN") { clocked_on: "!C";
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next_state: D;
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clear: "CLR";
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preset: "PRE"; }
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pin(C) { direction: input;
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clock: true; }
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pin(D) { direction: input; }
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pin(Q) { direction: output;
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function: "IQ"; }
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pin(CLR) { direction: input; }
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pin(PRE) { direction: input; }
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}
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}
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