mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-08 10:25:19 +00:00
Code Activity
yosys/tests/arch
History
gatecat cae905f551 Blackbox all whiteboxes after synthesis 
This prevents issues like processes in whiteboxes triggering an error in
the JSON backend.

Signed-off-by: gatecat <gatecat@ds0.me>
2021-03-17 21:07:20 +00:00
..
anlogic tests: Centralize test collection and Makefile generation 2020-09-21 15:07:02 +02:00
common intel_alm: Add multiply signedness to cells 2020-08-26 22:50:16 +02:00
ecp5 Blackbox all whiteboxes after synthesis 2021-03-17 21:07:20 +00:00
efinix tests: Centralize test collection and Makefile generation 2020-09-21 15:07:02 +02:00
gowin tests: Centralize test collection and Makefile generation 2020-09-21 15:07:02 +02:00
ice40 tests: Centralize test collection and Makefile generation 2020-09-21 15:07:02 +02:00
intel_alm tests: Centralize test collection and Makefile generation 2020-09-21 15:07:02 +02:00
machxo2 machxo2: Switch to LUT4 sim model which propagates less undefined/don't care values. 2021-02-23 17:39:58 +01:00
nexus nexus: DSP inference support 2020-11-20 08:45:55 +00:00
xilinx xilinx_dffopt: Don't crash on missing IS_*_INVERTED. 2021-01-27 00:32:00 +01:00
run-test.sh tests: extend tests/arch/run-tests.sh for defines 2020-03-05 08:08:32 -08:00