mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-07 09:55:20 +00:00
2b270b2270
Makefiles now have `clean` target. Also fixed top level makefile calls to images directory. More yosys scripts instead of inline yosys commands in makefiles (which also means they can be included in the accompanying document when talking about the image generated). Fixed another couple image generators that were still outputting pdf directly. Fixed some hanging image references which hadn't been updated. Adjusted some text related to images, and included a couple more intermediate images on `memdemo`.
38 lines
1.1 KiB
Plaintext
38 lines
1.1 KiB
Plaintext
read_verilog macc_simple_test.v
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hierarchy -check -top test;;
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show -prefix macc_simple_test_00a -format dot -notitle -lib macc_simple_xmap.v
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extract -constports -map macc_simple_xmap.v;;
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show -prefix macc_simple_test_00b -format dot -notitle -lib macc_simple_xmap.v
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#################################################
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design -reset
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read_verilog macc_simple_test_01.v
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hierarchy -check -top test;;
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show -prefix macc_simple_test_01a -format dot -notitle -lib macc_simple_xmap.v
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extract -map macc_simple_xmap.v;;
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show -prefix macc_simple_test_01b -format dot -notitle -lib macc_simple_xmap.v
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#################################################
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design -reset
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read_verilog macc_simple_test_02.v
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hierarchy -check -top test;;
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show -prefix macc_simple_test_02a -format dot -notitle -lib macc_simple_xmap.v
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extract -map macc_simple_xmap.v;;
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show -prefix macc_simple_test_02b -format dot -notitle -lib macc_simple_xmap.v
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#################################################
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design -reset
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read_verilog macc_simple_xmap.v
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hierarchy -check -top macc_16_16_32;;
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show -prefix macc_simple_xmap -format dot -notitle
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