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10 lines
308 B
Text
10 lines
308 B
Text
read_verilog latches.v
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proc
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hierarchy -top latches
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flatten
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synth_xilinx
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#Vivado synthesizes 1 BUFG, 8 LDCE.
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select -assert-count 2 t:LUT2
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select -assert-count 1 t:$_DLATCH_P_
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#ERROR: Assertion failed: selection is not empty: t:LUT2 t:$_DLATCH_P_ %% t:* %D
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#select -assert-none t:LUT2 t:$_DLATCH_P_ %% t:* %D
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